FinFET Inner Liner Profile for Stress-Induced Fin Bending

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Solution Overview

Problem

Existing FinFET devices face challenges in maintaining fin structure integrity and performance due to bending issues caused by uneven stress, which affects the device's efficiency and reliability.

Innovation Solution

The formation of inner liner layers higher than outer liner layers on fin structures, controlled through a specific etching process, prevents fin bending by maintaining the fin profile and shape, ensuring proper stress distribution and device performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional liner layers are formed on fin structures, then the fin structures are protected, but uneven stress causes fin bending and structure degradation

Engineering Contradiction:

Improvefin structure integrityVSAvoidfin profile

Core Design Contradiction:

ReliabilityVSShape

Solution Approach 1:

The patent applies different liner layer configurations to different regions of the fin structure. Inner liner layers are formed on inner sidewalls facing adjacent fins, while outer liner layers are formed on outer sidewalls. The inner liner layers are selectively removed to create voids that relieve compressive stress, preventing fin bending while maintaining protection where needed.

Inventive Principle:

Principle #3Local quality

Solution Approach 2:

The liner layer is segmented into multiple distinct components: inner liner layers on inner sidewalls, outer liner layers on outer sidewalls, and void regions between adjacent fins. This segmentation allows differential stress management across the fin structure, with each segment serving a specific function in preventing bending.

Inventive Principle:

Principle #1Segmentation

2Reliability

If stress is relieved between adjacent fins, then fin bending is prevented, but device complexity increases due to multiple liner layer formation steps

Engineering Contradiction:

Improvefin structure stabilityVSAvoidliner layer formation process

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The liner layers are formed conformally on the fin structures before any stress relief operations. This preliminary formation ensures uniform coverage and establishes the baseline protective layer, after which selective removal creates the stress-relieving voids in a controlled manner.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

portions of the inner liner layers are selectively removed (taken out) from regions between adjacent fins to create voids. This extraction relieves compressive stress in critical areas while maintaining liner layer protection on fin surfaces, balancing stress relief with structural integrity.

Inventive Principle:

Principle #2Taking out (Extraction)

Data Source

PatentUS11923359B2Method for forming fin field effect transistor (FinFET) device structure

Publication Date: 2024.03.05 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

A method for forming a FinFET device structure is provided. The method includes forming a first fin structure and a second fin structure over a substrate and forming a liner layer over the first fin structure and the second fin structure. The method also includes forming an isolation layer over the liner layer and removing a portion of the liner layer and a portion of the isolation layer, such that the liner layer includes a first liner layer on an outer sidewall surface of the first fin structure and a second liner layer on an inner sidewall surface of the first fin structure, and a top surface of the second liner layer is higher than a top surface of the first liner layer.