FinFET Isolated Source Drain Leakage Reduction

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Solution Overview

Problem

Current semiconductor technologies face challenges in reducing leakage current, particularly the short-channel effect and junction leakage from the source and drain to the substrate in FinFET transistors, which hinder the development of smaller, higher-density, and lower-power devices.

Innovation Solution

A method is introduced to electrically isolate the source and drain of FinFETs from the substrate by using a semiconductor structure with a dielectric layer and epitaxial growth, where the top portion of the fin is physically separated from the bottom portion, and a continuous dielectric layer is formed in the gaps to reduce leakage currents.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-affected harmful factors

If the active area of a transistor is raised to separate it from the substrate (e.g., FinFETs), then junction leakage from source and drain to substrate is reduced, but device size increases and density decreases

Engineering Contradiction:
Improvejunction leakageVSAvoiddevice area
Core Design Contradiction:
Object-affected harmful factorsVSArea of moving object

Solution Approach 1:

The fin structure is divided into two separate portions: a bottom portion remaining on the substrate and a top portion elevated above the substrate. This segmentation allows the source and drain regions to be isolated from the substrate, reducing junction leakage while maintaining a compact footprint.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The transistor structure transitions from a planar configuration to a three-dimensional FinFET structure with the fin extending vertically from the substrate. This dimensional change increases the effective channel area without proportionally increasing the planar device footprint, thereby reducing leakage while maintaining high density.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Area of moving object

If device size is reduced to increase density, then area is reduced, but leakage current increases due to short-channel effects

Engineering Contradiction:
Improvedevice areaVSAvoidleakage current
Core Design Contradiction:
Area of moving objectVSObject-affected harmful factors

Solution Approach 1:

By segmenting the fin into bottom and top portions with a gap between them, the source and drain regions are electrically isolated from the substrate. This prevents short-channel leakage effects while allowing the use of smaller gate lengths to achieve higher device density.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A dielectric material is introduced as an intermediary between the top fin portion and the substrate, filling the gap and providing electrical isolation. This intermediary structure blocks leakage current paths while maintaining the compact device geometry needed for high density.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach significantly reduces reverse biased junction leakage, gate-induced drain leakage, and punch-through current, leading to FinFETs with low power consumption and high performance without increasing the number of masking steps, thus enabling more efficient and cost-effective semiconductor fabrication.

Implementation Method 1

a continuous dielectric layer is formed in the gaps and around the layer of epitaxy in the source region and the drain region

Methodology Applied
Scientific EffectElectrical insulation: Dielectric

Implementation Method 2

an active region having a source region, a drain region and a channel region therebetween, the active region including a layer of epitaxy surrounding a top portion of the at least one semiconductor fin

Methodology Applied
Scientific EffectEpitaxy: Epitaxy

Data Source

PatentUS10128333B2FinFET with isolated source and drain
Publication Date: 2018.11.13 GLOBALFOUNDRIES US INC
  • US10128333B2 patent drawing
  • US10128333B2 patent drawing
  • US10128333B2 patent drawing

AI summary

A FinFET has shaped epitaxial structures for the source and drain that are electrically isolated from the substrate. Shaped epitaxial structures in the active region are separated from the substrate in the source and drain regions while those in the channel region remain. The gaps created by the separation in the source and drain are filled with electrically insulating material. Prior to filling the gaps, defects created by the separation may be reduced.