FinFET Isolation Structure for Dense Contact Spacing
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Solution Overview
Problem
Highly integrated IC devices require high operation speed and accuracy while minimizing the area occupied by interconnections and contacts, while maintaining a stable insulation distance between contacts.
Innovation Solution
The IC device includes fin patterns on a substrate, gate electrodes perpendicular to the fin patterns, source/drain regions on the fin patterns, and an isolation region between adjacent fin patterns, with a non-uniform height at the bottom relative to the substrate, allowing for efficient use of space and insulation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the area occupied by interconnections and contacts is reduced to increase integration density, then the operation speed and accuracy may deteriorate due to insufficient insulation distance
Solution Approach 1:
The isolation region extends in the vertical direction (depth) beneath the gate electrode, creating a three-dimensional isolation structure. This vertical extension provides additional insulation distance without occupying extra lateral area, thus maintaining integration density while ensuring reliable insulation between adjacent contacts
Solution Approach 2:
The isolation region is nested beneath the gate electrode structure, utilizing the vertical space under the existing gate. This nested configuration provides insulation functionality without adding lateral footprint, allowing reduced contact area while maintaining insulation distance
2Ease of manufacture
If the isolation region has uniform thickness, then manufacturing is simpler, but it cannot provide both sufficient insulation distance and efficient space utilization
Solution Approach 1:
The isolation region has non-uniform thickness with a first portion extending deeper than the second portion. The first portion provides enhanced insulation where needed beneath the gate electrode, while the second portion provides sufficient insulation in other areas. This localized variation in thickness optimizes both insulation effectiveness and space utilization
3Area of stationary object
If contacts are placed closer together to reduce area, then insulation distance may be compromised, but maintaining larger insulation distance reduces integration density
Solution Approach 1:
The isolation region extends vertically beneath the gate electrode, providing insulation distance in the depth direction rather than requiring increased lateral spacing. This allows contacts to be placed closer together in the planar direction while maintaining sufficient insulation distance through the vertical extension of the isolation structure
Data Source
AI summary
An integrated circuit (IC) device includes a first region and a second region adjacent to each other along a first direction on a substrate, fin patterns in each of the first and second regions extending along a second direction perpendicular to the first direction; gate electrodes extending along the first direction and intersecting the fin patterns; and an isolation region between the first and second regions, a bottom of the isolation region having a non-uniform height relative to a bottom of the substrate.