FinFET Isolation Structures for Source-Drain Epitaxy

Solution Overview

Problem

In FinFET-based CMOS fabrication, electrical shorts between source/drain regions occur due to large gate electrode extensions, leading to area penalties and additional capacitance, which compromise transistor packing density and performance.

Innovation Solution

The formation of isolation structures that laterally surround the gate material block, preventing lateral growth of semiconductor material during epitaxial growth and thus preventing the merging of source/drain regions at the ends of the gate structures, allowing for a smaller lateral distance between the gate and semiconductor fins without causing electrical shorts.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the gate electrode is extended beyond the active region to prevent merging of source/drain regions, then electrical shorts between source/drain regions are prevented, but area penalty increases and transistor packing density decreases

Engineering Contradiction:

Improveprevention of electrical shorts between source/drain regionsVSAvoidtransistor area

Core Design Contradiction:

ReliabilityVSArea of stationary object

Solution Approach 1:

The isolation function is segmented from the gate electrode extension and assigned to separate isolation structures formed at the ends of the gate material block. This allows the gate electrode to be truncated earlier without compromising source/drain isolation, reducing the area occupied by the gate extension.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Isolation structures are introduced as intermediary elements between the gate material block and the source/drain regions. These structures perform the isolation function that would otherwise require gate electrode extension, enabling more compact transistor design while preventing electrical shorts.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Reliability

If the gate electrode is extended beyond the active region to prevent merging of source/drain regions, then electrical shorts between source/drain regions are prevented, but additional capacitance between gate electrode and source/drain regions increases

Engineering Contradiction:

Improveprevention of electrical shorts between source/drain regionsVSAvoidcapacitance between gate electrode and source/drain regions

Core Design Contradiction:

ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The isolation function is segmented from the gate electrode extension and assigned to separate isolation structures formed at the ends of the gate material block. This allows the gate electrode to be truncated earlier without compromising source/drain isolation, reducing the area occupied by the gate extension.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Isolation structures are introduced as intermediary elements between the gate material block and the source/drain regions. These structures perform the isolation function that would otherwise require gate electrode extension, enabling more compact transistor design while preventing electrical shorts.

Inventive Principle:

Principle #24Intermediary (Mediator)

3Productivity

If the lateral distance between gate material block and semiconductor fins is reduced to improve packing density, then transistor packing density increases, but electrical shorts between source/drain regions occur

Engineering Contradiction:

Improvetransistor packing densityVSAvoidprevention of electrical shorts between source/drain regions

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

Isolation structures are formed at the ends of the gate material block before the epitaxial growth of source/drain regions. This preliminary isolation prevents lateral merging of source/drain regions during subsequent processing, enabling reduced lateral spacing between gate and fins without causing electrical shorts.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

Isolation structures are introduced as intermediary elements between the gate material block and the source/drain regions. These structures perform the isolation function that would otherwise require gate electrode extension, enabling more compact transistor design while preventing electrical shorts.

Inventive Principle:

Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution effectively prevents electrical shorts between source/drain regions, reducing area penalties and additional capacitance, while maintaining transistor performance and packing density.

Implementation Method 1

a semiconductor material is epitaxially grown on portions of each of the plurality of semiconductor fins that are not covered by the at least one gate stack

Methodology Applied

Scientific EffectEpitaxial growth: Epitaxy

Data Source

PatentUS10084041B2Method and structure for improving FinFET with epitaxy source/drain

Publication Date: 2018.09.25 INTERNATIONAL BUSINESS MACHINE CORPORATION

AI summary

Isolation structures are formed to laterally surround a gate material block such that each sidewall of the gate material block abuts a corresponding sidewall of the isolation structures. Sidewalls of the gate material bock define ends of gate structures to be subsequently formed. The isolation structures obstruct lateral growth of a semiconductor material during a selective epitaxial grown process in formation of source/drain regions, thereby preventing merging of the source/drain regions at the ends of gate structures. As a result, a lateral distance between each sidewall of the gate material block and a corresponding outermost sidewall of an array of a plurality of semiconductor fins can be made sufficiently small without causing the electrical shorts of the source/drain regions.