FinFET Device With Isolation Gaps For Leakage Reduction
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Solution Overview
Problem
Conventional FinFET devices face challenges in manufacturing complexity and performance due to scaling down in semiconductor IC production, particularly in achieving effective intra-fin isolation and reducing leakage current.
Innovation Solution
A method for fabricating FinFET devices involves forming semiconductor fins on a substrate, creating isolation structures between them, and forming gate structures across the fins to protect and separate the fins, with gaps between source/drain structures and isolation structures to prevent dopant out-diffusion and enhance intra-fin isolation, thereby reducing leakage current and improving performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional FinFET fabrication methods are used, then manufacturing process is simpler, but intra-fin isolation is insufficient and leakage current increases
Solution Approach 1:
The patent divides the fin structure into multiple segments by forming gaps between adjacent fins. These gaps create physical separation that enhances intra-fin isolation and reduces leakage current between neighboring fins, directly addressing the isolation deficiency in conventional FinFET devices.
Solution Approach 2:
The patent applies different properties to different regions: the fins are made with specific crystal orientations for optimal carrier mobility, while the gaps between fins provide isolation properties. This local differentiation allows each region to perform its specific function optimally - fins for current conduction and gaps for isolation.
2Reliability
If fin height is increased to improve current flow, then device performance improves, but fin bending occurs
Solution Approach 1:
The patent introduces support structures at the base of the fins that act as counterweights to prevent fin bending. These support regions provide mechanical reinforcement that counteracts the bending forces that would otherwise cause structural failure in tall, high-performance fins.
Solution Approach 2:
The patent performs preliminary structural reinforcement by forming support structures and gaps before final fin formation. This preliminary action prevents fin bending from occurring in the first place, allowing fins to be formed with optimal heights for performance without subsequent structural issues.
3Reliability
If doping is increased to improve device performance, then current flow improves, but dopant out-diffusion increases
Solution Approach 1:
The patent extracts or removes the harmful effect of dopant out-diffusion by forming gaps that physically isolate the doped regions. These gaps prevent dopants from diffusing out of the intended areas, allowing higher doping concentrations to be used for improved performance without the harmful side effect of dopant migration.
Solution Approach 2:
The gaps act as intermediary barriers between doped regions. These intermediary structures prevent direct interaction between adjacent doped fins, blocking the diffusion path of dopants while allowing the doped regions to maintain their intended electrical properties for optimal device performance.
Data Source
AI summary
A semiconductor device includes a semiconductor substrate, at least one first isolation structure, at least one second isolation structure, a source structure, a drain structure and a plurality of semiconductor fins. The first isolation structure and the second isolation structure are located on the semiconductor substrate. The source structure is located on the semiconductor substrate and the first isolation structure, in which at least one first gap is located between the source structure and the first isolation structure. The drain structure is located on the semiconductor substrate and the second isolation structure, in which at least one second gap is located between the drain structure and the second isolation structure. The semiconductor fins protrude from the semiconductor substrate, in which the semiconductor fins are spaced apart from each other, and connect the source structure and the drain structure.


