FinFET Isolation Structure Mitigating Substrate Punch-Through
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Solution Overview
Problem
The substrate punch-through effect in FinFETs leads to high leakage current, degrading device performance due to insufficient anti-punch through (APT) dopant concentration, causing carrier transportation paths between adjacent fins.
Innovation Solution
A method involving a first and second implantation process to create doped portions in the shallow trench isolation (STI) region with specific peak concentrations of dopants, and selectively growing semiconductor materials with different lattice constants to form a fin structure with an isolation structure that impedes APT dopant out-diffusion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a FinFET structure is implemented to increase device density and performance, then higher device density and performance are achieved, but substrate punch-through effect causes high leakage current that degrades device performance
Solution Approach 1:
The patent applies preliminary action by forming doped portions in the STI region before forming the fin structure. The first doped portion is created through ion implantation into the STI region prior to fin formation, and the second doped portion is formed after fin recess but before gate formation. These preliminary doping actions establish anti-punch-through barriers that prevent leakage current before the fin structure is complete, thereby resolving the contradiction between high device density and low leakage current.
2Reliability
If dopant concentration is increased to reduce punch-through effect, then leakage current is reduced, but dopant out-diffusion occurs that depletes APT dopant concentration
Solution Approach 1:
The patent uses the STI region as an intermediary medium to contain and protect the APT dopant. The STI region acts as a physical barrier that prevents dopant out-diffusion into adjacent fins. By implanting dopant into the STI region rather than directly into the fin, the STI serves as an intermediary that holds the dopant in place, maintaining stable dopant concentration while still providing the necessary anti-punch-through effect.
Solution Approach 2:
The patent performs preliminary ion implantation into the STI region before fin formation to establish the first doped portion. This preliminary action ensures that the dopant is already in place and protected by the STI structure before subsequent processing steps could cause out-diffusion. The timing of the doping action is critical - it occurs early in the process when the STI provides immediate containment.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the punch-through effect and leakage current, enhancing device performance by isolating each fin from neighboring fins and maintaining desired dopant concentrations.
Implementation Method 1
performing a first implantation process to the STI region, whereby a portion of the STI region comprises a dopant with a first peak concentration
Implementation Method 2
selectively growing a first semiconductor material in the fin recess, a topmost surface of the first semiconductor material being below a topmost surface of the dielectric material; selectively growing a second semiconductor material over the first semiconductor material in the fin recess
Implementation Method 3
maintaining desired anti-punch through (APT) dopant concentrations in the fin structure by impeding APT dopant out-diffusion
Data Source
AI summary
A representative fin field effect transistor (FinFET) includes a substrate having a major surface; a fin structure protruding from the major surface having a lower portion comprising a first semiconductor material having a first lattice constant; an upper portion comprising the first semiconductor material. A bottom portion of the upper portion comprises a dopant with a first peak concentration. A middle portion is disposed between the lower portion and upper portion, where the middle portion comprises a second semiconductor material having a second lattice constant different from the first lattice constant. An isolation structure surrounds the fin structure, where a portion of the isolation structure adjacent to the bottom portion of the upper portion comprises the dopant with a second peak concentration equal to or greater than the first peak concentration.