FinFET Isolation Structure for Channel and Threshold Voltage Control
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Solution Overview
Problem
Current FinFET fabrication methods face challenges in integrating single diffusion break (SDB) structures and metal gate fabrication, leading to inefficiencies in controlling the channel region and threshold voltage of fin-shaped transistors.
Innovation Solution
A method involving forming fin-shaped structures on a substrate, creating trenches to divide them into portions, and filling dielectric layers in these trenches to form SDB and gate isolation structures, with specific processes including etching, mask formation, and dielectric layer deposition to achieve improved control over the channel region and threshold voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If shallow trench isolation (STI) is formed around the fin-shaped structure and insulating material is deposited into the trench to form single diffusion break (SDB) structure, then the channel region control is improved, but the integration with metal gate fabrication remains problematic and complex
Solution Approach 1:
The patent combines the SDB structure formation and gate isolation structure formation into a single integrated process. By forming both structures simultaneously using the same trench etching and dielectric filling steps, the method eliminates the need for separate processing steps, thereby reducing fabrication complexity while maintaining precise channel region control.
Solution Approach 2:
The dielectric layer deposited in the trench serves multiple functions simultaneously: it forms the SDB structure for diffusion control and the gate isolation structure for electrical isolation. This multi-functional approach reduces the number of processing steps and simplifies the overall fabrication process while achieving both channel control and gate isolation requirements.
2Manufacturing precision
If the fin-shaped structure is divided into portions using trenches, then the control over threshold voltage is improved, but the fabrication process becomes more complex
Solution Approach 1:
The patent merges the fin division process with the SDB and gate isolation structure formation. The trenches that divide the fin structure are the same trenches that will be filled with dielectric material to form the isolation structures. This integration means that while the fin is divided for threshold voltage control, the same process simultaneously creates the necessary isolation structures, rather than requiring separate division and isolation steps.
Solution Approach 2:
The method performs preliminary actions by forming the trenches for fin division first, then utilizing these pre-formed trenches for subsequent dielectric filling to create SDB and gate isolation structures. This preliminary trench formation simplifies the overall process by establishing the structural divisions needed for threshold voltage control before proceeding with the isolation structure formation in the same trenches.
3Reliability
If multiple trenches are formed to create SDB and gate isolation structures, then the electrical isolation is improved, but the number of processing steps increases
Solution Approach 1:
The patent combines the formation of multiple trenches for SDB structures and gate isolation structures into a single etching process. Instead of forming trenches sequentially in separate steps, the method creates all necessary trenches simultaneously or in an integrated manner, then fills them with dielectric material in a unified process. This approach maintains the electrical isolation provided by multiple trenches while significantly improving processing efficiency by reducing the number of discrete processing steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the control over the channel region and threshold voltage of fin-shaped transistors, reducing drain-induced barrier lowering and short channel effects, while allowing for increased current between the source and drain, and improved integration of SDB and metal gate structures.
Implementation Method 1
insulating material is deposited into the trench to form single diffusion break (SDB) structure or isolation structure
Data Source
AI summary
A semiconductor device includes a gate isolation structure on a shallow trench isolation (STI), a first epitaxial layer on one side of the gate isolation structure, a second epitaxial layer on another side of the gate isolation structure, first fin-shaped structures directly under the first epitaxial layer, and second fin-shaped structures directly under the second epitaxial layer, in which the STI surrounds the first fin-shaped structures and the second fin-shaped structures.