FinFET Multi-Layer Isolation Structure for Void-Free Device Separation
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Solution Overview
Problem
Existing semiconductor devices face challenges in achieving enhanced device isolation characteristics, particularly in multi-gate transistors, where the use of single deep trench isolation can lead to voids and stress, complicating manufacturing processes and reducing process margins.
Innovation Solution
The semiconductor device employs multiple device isolating layers with different depths and materials, including Tonen SilaZene (TOSZ) or flowable chemical vapor deposition (FCVD) oxide, high density plasma (HDP) oxide, undoped silicate glass (USG) oxide, and nitride, with specific etching resistance and gap fill properties to provide efficient isolation for various breakdown voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If single deep trench isolation is used, then device isolation is achieved, but voids and stress occur complicating manufacturing
Solution Approach 1:
The single deep trench isolation is divided into multiple isolation layers (first device isolating layer, second device isolating layer, third device isolating layer) with different depths and materials. Each layer serves a specific function: the first layer provides shallow isolation, the second layer provides deep isolation, and the third layer fills gaps between gates. This segmentation eliminates voids and stress while simplifying the manufacturing process by allowing each layer to be optimized independently.
Solution Approach 2:
Different materials are used for different isolation layers based on their specific requirements. The first device isolating layer uses TOSZ or FCVD oxide for superior gap fill properties, the second layer uses HDP oxide or USG oxide for lower shrink rate, and the third layer uses nitride for lower etching resistance. This local quality approach ensures each layer performs optimally for its specific function while collectively providing enhanced device isolation.
2Reliability
If multiple device isolating layers with different materials are used, then device isolation characteristics are enhanced, but device complexity increases
Solution Approach 1:
The isolation structure is segmented into three distinct layers with different materials and depths, where each layer targets specific isolation requirements. This segmentation enhances device isolation characteristics by addressing different breakdown voltages and stress conditions independently, while the modular nature of the segmented structure actually simplifies the overall design and manufacturing process compared to a monolithic complex structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This multi-layer approach enhances device isolation characteristics, improves manufacturing efficiency, and ensures reliable operation by addressing the limitations of single deep trench isolation, such as voids and stress, while maintaining superior gap fill properties and etching resistance.
Implementation Method 1
the first device isolating layer may include a Tonen SilaZene (TOSZ) or Towable chemical vapor deposition (FCVD) oxide
Implementation Method 2
the second device isolating layer may include a high density plasma (HDP) oxide
Data Source
AI summary
Semiconductor devices and methods of forming the semiconductor devices are provided. The methods may include forming a fin, forming a first device isolating layer on a side of the fin, forming a second device isolating layer extending through the first device isolating layer, forming first and second gates traversing the fin and forming a third device isolating layer between the first and second gates. The first device isolating layer may include a first material and a lowermost surface at a first depth. The second device isolating layer may include a second material and a lowermost surface at a second depth greater than the first depth. The third device isolating layer may extend into the fin, may include a lowermost surface at a third depth less than the first depth and a third material different from the first and the second materials.