Vertical FinFET Junctions with Delta-Dopant Buffer
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Solution Overview
Problem
Conventional finFET fabrication methods result in tapered source and drain junction profiles, leading to variable channel lengths and degraded device performance due to dopant diffusion variability and the short-channel effect, which causes threshold variability among devices on the same substrate.
Innovation Solution
The formation of finFETs with vertical and abrupt source and drain junctions is achieved by recessing the source and drain regions and depositing a delta-dopant buffer, followed by epitaxial growth of raised source and drain structures, eliminating the need for thermal diffusion and thereby maintaining abrupt dopant profiles and imparting strain to the channel region.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional fabrication methods are used to form source and drain junctions in finFETs, then the manufacturing process is simpler, but the junction profiles become tapered leading to variable channel lengths and threshold variability
Solution Approach 1:
The source and drain regions are recessed before forming the junctions, creating a pre-defined geometry that prevents tapering during subsequent processing. This preliminary structural preparation ensures that the junction profiles remain sharp and vertical throughout fabrication, directly addressing the precision issue while managing complexity through planned process sequencing
Solution Approach 2:
The patent replaces thermal diffusion processes with direct deposition methods (such as atomic layer deposition) to form the source and drain junctions. This substitution eliminates the dopant diffusion that causes tapered profiles, achieving sharp vertical junctions through a more controlled, non-thermal process that deposits material in a layer-by-layer fashion
2Manufacturing precision
If thermal diffusion is used to drive in dopants, then the doping process is well-established, but the dopant profiles become diffused rather than abrupt
Solution Approach 1:
The patent substitutes thermal diffusion with direct deposition techniques such as atomic layer deposition (ALD) to introduce dopants into the source and drain regions. This replacement eliminates the thermal energy that causes dopant spreading, resulting in abrupt, well-defined dopant profiles that match the physical junction geometry exactly, while maintaining manufacturing feasibility through established deposition processes
Solution Approach 2:
The invention changes the fundamental parameter of how dopants are introduced—from thermal diffusion driven by temperature gradients to direct physical deposition at controlled rates. This parameter change transforms the dopant profile from a gradual diffusion curve to an abrupt step-function profile, achieving the desired precision while using controllable deposition parameters
3Productivity
If the channel length is reduced to increase device density, then the integration density improves, but the short-channel effect increases causing threshold variability
Solution Approach 1:
The patent transitions from planar junctions to three-dimensional vertical junctions in the finFET structure. By forming source and drain regions that extend vertically along the fin structure with sharp, well-defined profiles, the invention maintains precise channel length control in the horizontal dimension even as devices are scaled for higher density, thereby suppressing short-channel effects through improved electrostatic control
Solution Approach 2:
The invention uses spacer materials deposited conformally on the fin structure to define the source and drain regions. This spacer-based definition method provides precise lateral positioning that maintains consistent channel lengths across the device array, enabling high-density integration while preserving threshold voltage uniformity through geometric control
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances carrier mobility and device performance by achieving higher effective current at shorter channel lengths with reduced off-state leakage current, providing consistent threshold values across devices.
Implementation Method 1
a buffer disposed between the second semiconductor material and the first semiconductor material... provides a localized (delta profile) high dopant concentration to form abrupt dopant profiles at the source and drain junctions
Implementation Method 2
Raised source and drain structures may be epitaxially grown on the buffer, and may be used to impart strain to the channel region of the finFET
Data Source
AI summary
Methods and structures for forming short-channel finFETs with vertical and abrupt source and drain junctions are described. During fabrication, source and drain regions of the finFET may be recessed vertically and laterally under gate spacers. A buffer having a high dopant density may be formed on vertical sidewalls of the channel region after recessing the fin. Raised source and drain structures may be formed at the recessed source and drain regions. The raised source and drain structures may impart strain to the channel region.