FinFET LDD Doping with Sidewall Spacers for Uniform Implantation

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Solution Overview

Problem

Ion implantation struggles to achieve uniform dopant concentration in FinFET devices due to directional effects and shadowing issues, limiting the effectiveness of FinFET performance.

Innovation Solution

A method involving ion implantation, etching, and the use of fin sidewall spacers to dope source/drain extensions in FinFETs, which overcomes shadowing effects and ensures near-uniform dopant distribution across the fin, maximizing the benefits of three-dimensional FinFET technologies.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If ion implantation is used to dope FinFET devices, then doping can be performed using traditional planar device methods, but uniform dopant concentration cannot be achieved due to directional effects and shadowing

Engineering Contradiction:
Improvedoping process compatibilityVSAvoiddopant concentration uniformity
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The doping process is divided into multiple sequential ion implantation steps, each targeting different regions of the fin structure. First, a preliminary doping step is performed, followed by additional doping steps that progressively build up the dopant concentration in the LDD regions, allowing uniform distribution throughout the three-dimensional fin structure

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from traditional planar doping to three-dimensional fin doping by adjusting ion implantation parameters including tilt angles and multiple implantation directions. This multi-dimensional approach ensures dopants reach all regions of the vertical fin structure, overcoming the limitations of single-directional implantation

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Manufacturing precision

If tilted ion implantation is used to improve fin doping, then some dopant distribution can be achieved, but shadowing effects from nearby structures block ion paths

Engineering Contradiction:
Improvedopant distributionVSAvoidshadowing effects
Core Design Contradiction:
Manufacturing precisionVSObject-affected harmful factors

Solution Approach 1:

The doping process employs periodic ion implantation cycles with alternating tilt angles and directions. Multiple implantation steps are performed sequentially, each with different angular parameters, allowing ions to reach various fin surfaces that would be blocked by shadowing in any single implantation direction

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

A preliminary low-energy ion implantation step is performed first to introduce dopants into the fin structure before subsequent higher-energy implantation steps. This staged approach ensures that shadowed regions receive initial dopant exposure, which is then enhanced by later implantation cycles

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach results in uniformly doped LDD regions, enhancing the performance of FinFET devices by maximizing current flow and reducing short channel effects, with dopant concentrations in the range of 2E19 to 5E19 cm−2 achieved.

Implementation Method 1

ion implantation, traditionally used for doping planar devices, has been similarly used for doping FinFET devices to create lightly doped source/drain (LDD) regions

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Data Source

PatentUS12068371B2Method for FinFET LDD doping
Publication Date: 2024.08.20 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12068371B2 patent drawing
  • US12068371B2 patent drawing
  • US12068371B2 patent drawing

AI summary

A semiconductor device includes a substrate; an isolation structure over the substrate; a fin over the substrate and the isolation structure; a gate structure engaging a first portion of the fin; first sidewall spacers over sidewalls of the gate structure and over a second portion of the fin; source/drain (S/D) features adjacent to the first sidewall spacers; and second sidewall spacers over the isolation structure and over sidewalls of a portion of the S/D features. The second sidewall spacers include silicon oxide, silicon nitride, or silicon oxynitride. The second sidewall spacers and the second portion of the fin include a same dopant, wherein the dopant includes phosphorus.