FinFET Fabrication With Local Oxidation For Fin Dimension Control
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Solution Overview
Problem
The challenge in semiconductor manufacturing is the complexity of forming fins with different critical dimensions in FinFETs, which affects the control ability of the gate on the channel region and increases the difficulty of inhibiting short channel effects due to reduced channel length in MOSFETs.
Innovation Solution
A method involving a substrate with distinct regions for forming first and second fins, followed by the formation of a liner oxide layer, an insulating barrier layer, and a precursor material layer, with a curing annealing process to convert the precursor into oxide layers, allowing for the creation of fins with different feature sizes by controlling the oxidation scale and forming an isolation layer to simplify the fabrication process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the channel length of MOSFETs is continuously reduced to increase device density and switching speed, then the device density and switching speed are improved, but the control ability of the gate on the channel region is reduced and short channel effects increase
Solution Approach 1:
The patent transitions from planar MOSFETs to FinFETs by introducing a three-dimensional fin structure. The gate wraps around the fin from multiple sides (at least two sides), adding vertical control dimension beyond the traditional planar gate-channel interface. This dimensional change enables effective gate control even at reduced channel lengths, addressing the short channel effects while maintaining high device density.
2Manufacturing precision
If fins with different critical dimensions are formed in FinFETs to meet miniaturization requirements, then the device performance is improved, but the fabrication process complexity increases
Solution Approach 1:
The patent applies local quality by forming different oxide layers (first oxide layer and second oxide layer) with different thicknesses on different regions of the fin structure. The first oxide layer is formed on portions of the fin, while the second oxide layer is formed on other portions, allowing different critical dimensions to be achieved through localized oxidation processes rather than requiring entirely different fabrication sequences for each fin size.
Solution Approach 2:
The patent performs preliminary oxidation to form the first oxide layer before forming the second oxide layer. This sequential approach allows the fin structure to be prepared in advance with a baseline oxide layer, and then additional oxide is added in specific regions to create the final differential critical dimensions, simplifying the overall fabrication process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method effectively reduces the oxidation scale of the first fins, enabling the formation of fins with different sizes while improving the interface properties and reducing the complexity of the fabrication process, thereby enhancing the control ability of the gate and inhibiting short channel effects.
Implementation Method 1
performing a curing annealing process to convert the precursor material into an insulation layer, a first oxide layer being formed on the side surfaces of the first fins, and a second oxide layer being formed on the side surfaces of the second fins
Data Source
AI summary
The present disclosure provides fin field-effect transistors and fabrication methods thereof. An exemplary fabrication process includes providing a substrate having a first region and a second region; forming first fins in the first region and second fins in the second region; forming a liner oxide layer on side surfaces of the first fins, the second fins and a surface of the substrate; forming an insulating barrier layer on the liner oxide layer in the first region; forming a precursor material layer on the insulating barrier layer in the first region and on the liner oxide layer in the second region; performing a curing annealing process to convert the precursor material into an insulation layer; and removing a top portion of the insulation layer to form an isolating layer and removing portions of the liner oxide layer, the insulating barrier layer, the first oxide layer and the second oxide layer.