FinFET Landing Plug Isolation via Capping Layer
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Solution Overview
Problem
The challenge in semiconductor devices is achieving stable operation and expanded current paths in FinFET transistors with reduced design rules, particularly due to self-aligned contact defects caused by shorts between landing plugs and conductive layers, which complicates the control of cell threshold voltage and driving current characteristics.
Innovation Solution
A method for manufacturing semiconductor devices with a FIN structure involves forming a device isolation layer, creating recess trenches and wider trenches in the isolation layer, filling these with a capping layer, and performing cleaning processes to form a bottom protrusion and gate stacks, thereby preventing self-aligned contact defects and enhancing current paths.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a FinFET structure is used to expand the current path, then driving current characteristics are improved, but self-aligned contact defects occur due to shorts between landing plugs and conductive layers
Solution Approach 1:
A capping layer is introduced as an intermediary element that fills the trench formed in the device isolation layer. This capping layer acts as a physical barrier that prevents the short between the landing plug and the conductive layer, thereby eliminating the self-aligned contact defect while preserving the FinFET structure's current path expansion benefits
Solution Approach 2:
The device isolation layer is segmented by forming a trench that divides the region where the landing plug would otherwise short with the conductive layer. This segmentation creates separate zones that prevent the harmful electrical connection while allowing the FinFET channel to maintain its extended current path
2Productivity
If the device isolation layer is removed below the recess gate to form FinFET, then the current path is expanded, but a short is generated between landing plug and conductive layer
Solution Approach 1:
The trench is formed in the device isolation layer before the landing plug is deposited. The capping layer is then filled into this pre-formed trench, creating a protective barrier in advance that prevents the subsequent shorting issue when the landing plug is formed, without compromising the FinFET current path expansion
Data Source
AI summary
Provided are a semiconductor device with a channel of a FIN structure and a method for manufacturing the same. In the method, a device isolation layer defining an active region is formed on a semiconductor substrate. A recess trench with a first width is formed in the active region, and a trench with a second width larger than the first width is formed in the device isolation layer. The trench formed in the device isolation layer is filled with a capping layer. A cleaning process is performed on the recess trench to form a bottom protrusion of a FIN structure including a protrusion and a sidewall. Gate stacks filling the recess trench are formed. A landing plug, which is divided by the capping layer filling the trench, is formed between the gate stacks.