FinFET Fabrication Using Mandrel and Spacer Patterning
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Solution Overview
Problem
The miniaturization of semiconductor devices poses challenges in the fabrication of fin field effect transistors (FinFETs) due to limitations in current mask and lithography techniques, leading to issues such as fin collapse and over-etching, which affect the precision and efficiency of the fin structure formation.
Innovation Solution
A method involving the formation of hard masks, mandrels, spacers, and patterned masks to precisely define and etch fin-shaped structures on a substrate, including a fin-cut process and shallow trench isolation, with adjustments in etching recipes and electrical potentials to control surface curvature and pitch between fin structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If current mask and lithography techniques are used to form fin structures, then the fabrication process is simpler, but the precision of fin structure definition deteriorates leading to fin collapse and over-etching
Solution Approach 1:
The fabrication process is divided into multiple stages: forming mandrels, forming spacers around mandrels, selectively removing mandrels, and forming patterned masks. This segmentation allows each step to be optimized independently, achieving high precision fin structure definition while managing overall process complexity through systematic breakdown of the fabrication sequence
Solution Approach 2:
Mandrels are formed in advance as temporary structures to define the positions of fin structures. These preliminary structures guide the subsequent spacer formation and pattern transfer processes, ensuring precise fin structure definition before the actual etching occurs
2Area of moving object
If the width of fins and pitch between fins are shrunk for miniaturization, then device density increases, but control over etching time and fin structure stability deteriorates
Solution Approach 1:
Spacers are introduced as intermediary structures formed around mandrels. These spacers serve as the actual pattern transfer masks for etching fin structures, allowing precise control over fin width and pitch at miniaturized dimensions. The spacer thickness, controlled by conformal deposition, directly determines fin dimensions with high precision
Solution Approach 2:
The invention changes the critical parameter from etching time control to spacer thickness control. By controlling the deposition thickness of spacer material through atomic layer deposition or chemical vapor deposition, the fin width and pitch are precisely controlled at miniaturized dimensions, eliminating the need for precise etching time control
3Productivity
If conventional etching is used to form fin structures, then the process is faster, but void formation and substrate uniformity deteriorate
Solution Approach 1:
The substrate surface is prepared in advance by forming a curved surface between fin structures before spacer and mandrel formation. This preliminary surface shaping prevents void formation during subsequent etching processes and ensures uniform substrate conditions, allowing fast etching without compromising uniformity
Solution Approach 2:
The invention introduces curved surfaces on the substrate between fin structures, replacing flat surfaces. This curvature prevents void formation during etching by ensuring proper material flow and deposition, while maintaining substrate uniformity. The curved surfaces are formed through selective etching or deposition processes
Data Source
AI summary
A method for fabricating semiconductor device includes the steps of: forming a hard mask on a substrate; forming a first mandrel and a second mandrel on the hard mask; forming a first spacer and a second spacer around the first mandrel and a third spacer and a fourth spacer around the second mandrel; removing the second mandrel; forming a patterned mask on the first mandrel, the first spacer, the second spacer, the third spacer, and the fourth spacer; and using the patterned mask to remove the third spacer and the hard mask.