FinFET Memory Device Body Bias Control via Dummy Substrate
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional FinFETs face challenges with threshold voltage control due to the use of silicon on insulator (SOI) substrates, leading to increased junction leakage current, off-current, and junction capacitance, as well as higher contact resistance and reduced integration density.
Innovation Solution
The semiconductor memory device employs a substrate with protruding fins, an insulating layer, and a storage node, where the fins' widths are narrower at the storage node contact region, and includes a gate electrode formed on the storage node, utilizing materials like polysilicon, silicon-germanium, or silicon nitride, and a bulk silicon or silicon-germanium substrate to control body-bias and reduce contact resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If FinFETs are manufactured using a silicon on insulator (SOI) substrate, then a fin may float on a body of the SOI substrate, but a threshold voltage of a transistor may not be controlled using a body bias
Solution Approach 1:
A dummy substrate is introduced as an intermediary between the SOI substrate and the floating fin structure. This dummy substrate provides a body bias control interface without requiring direct modification of the SOI substrate structure, enabling threshold voltage control while maintaining the benefits of the SOI configuration.
Solution Approach 2:
The substrate structure is segmented into a real SOI substrate and a separate dummy substrate. This segmentation allows the dummy substrate to serve specifically for body bias control functions, while the SOI substrate maintains its primary function of supporting the fin structure with reduced junction leakage.
2Reliability
If FinFETs are manufactured using a conventional bulk substrate, then a drain depletion region may be expanded, but this increases junction leakage current, off-current, and junction capacitance
Solution Approach 1:
The SOI substrate provides localized insulation properties at the fin-body interface, creating different electrical characteristics in different regions. The area under the fin has reduced junction leakage due to the insulating layer, while other regions maintain normal bulk substrate properties, allowing controlled depletion regions without excessive leakage.
3Reliability
If source and drain regions are formed to secure contact area, then contact resistance may be reduced, but the distance between fins becomes greater, reducing integration density
Solution Approach 1:
The contact structure transitions from a planar two-dimensional contact to a three-dimensional vertical contact through the fin structure. Current flows vertically through the fin from source to drain, allowing adequate contact area without increasing the lateral distance between fins, thereby maintaining high integration density while ensuring low contact resistance.
Data Source
AI summary
A semiconductor memory device and methods of manufacturing and operating the same may be provided. The semiconductor memory device may include a substrate, at least a pair of fins protruding from the semiconductor substrate and facing each other with a gap between fins of the pair of fins, an insulating layer formed between the pair of the fins, a storage node formed on the pair of fins and/or a surface of a portion of the insulating layer, and/or a gate electrode formed on the storage node.