FinFET Metal Gate Stack for Threshold Voltage and On-Current Control
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Solution Overview
Problem
The semiconductor industry faces challenges in manufacturing complex integrated circuits due to the scaling down of geometry sizes, which increases processing complexity and requires advanced methods for forming efficient semiconductor devices like fin-like field-effect transistors.
Innovation Solution
A method involving the formation of semiconductor devices with a fin structure, including steps such as patterning, insulating layer formation, gate dielectric layer deposition, and metal gate stack construction with a layered composition to optimize threshold voltage and on-current, using techniques like chemical vapor deposition and chemical mechanical polishing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If geometry size is scaled down to increase functional density, then production efficiency is improved and costs are lowered, but processing complexity increases
Solution Approach 1:
The gate structure is segmented into multiple functional layers including a gate electrode layer, a first interlayer dielectric, a second interlayer dielectric, and a capping layer. Each layer serves a specific function in managing the complex processing requirements while enabling continued scaling
Solution Approach 2:
The patent introduces a vertically stacked gate structure with multiple layers extending in the vertical dimension. This dimensional approach allows functional integration without increasing lateral footprint, thereby maintaining scaling benefits while managing processing complexity through three-dimensional architecture
2Ease of manufacture
If a simple gate structure is used, then manufacturing is easier, but threshold voltage control and on-current are insufficient
Solution Approach 1:
Different layers of the gate structure have different material compositions and properties optimized for specific functions: the gate electrode layer for electrical conduction, the interlayer dielectrics for insulation and stress control, and the capping layer for protection. This local differentiation enables precise threshold voltage control while maintaining manufacturability through specialized functional zones
Solution Approach 2:
The gate structure employs composite materials comprising multiple dielectric layers with different properties (e.g., first interlayer dielectric with different characteristics than the second interlayer dielectric). This composite approach provides both the electrical control needed for threshold voltage adjustment and the structural properties needed for reliable manufacturing
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the manufacturing efficiency of semiconductor devices by improving the on-current and reliability of the devices, allowing for flexible threshold voltage adjustment and better control across different gate lengths.
Implementation Method 1
using techniques like chemical vapor deposition and chemical mechanical polishing
Implementation Method 2
using techniques like chemical vapor deposition and chemical mechanical polishing
Data Source
AI summary
A method includes forming a semiconductor fin over a substrate; forming a gate structure over the semiconductor fin, the gate structure comprising: a first metallic layer; a second metallic layer over the first metallic layer, wherein the first metallic layer is a metal compound of a first element and a second element and the second metallic layer is a single-element metal of the second element; and an oxide layer between the first metallic layer and the second metallic layer.