FinFET Multi-Layer Source/Drain Epitaxy for Resistance Reduction
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Solution Overview
Problem
Current FinFET devices face challenges in achieving high dopant concentration in source/drain regions, which limits carrier mobility and increases channel resistance, making it difficult to achieve both high performance and low leakage current.
Innovation Solution
A multi-layered source/drain region structure is formed using epitaxial growth with varying dopant concentrations and thickness profiles, where each layer is grown under different process conditions to achieve high dopant activation and selective epitaxy growth, reducing channel resistance and contact resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high dopant concentration is achieved in source/drain regions, then carrier mobility is improved, but manufacturing complexity increases due to the need for multi-layered epitaxial growth with varying process conditions
Solution Approach 1:
The source/drain region is divided into multiple epitaxial layers with different dopant concentrations and thicknesses. Each layer is grown under specific process conditions to achieve optimal dopant activation while maintaining manufacturing feasibility through systematic process segmentation.
Solution Approach 2:
Different regions of the source/drain structure are assigned different dopant concentrations tailored to their specific functional requirements. The multi-layered structure enables local optimization of electrical properties without compromising the entire device structure.
2Reliability
If multi-layered epitaxial growth is used to achieve high dopant concentration, then channel resistance is reduced, but process time and manufacturing complexity increase
Solution Approach 1:
The multi-layered epitaxial growth process is implemented as a continuous manufacturing operation where each layer is grown sequentially under optimized conditions. This continuous approach minimizes process interruptions and achieves rapid dopant activation, reducing overall process time despite the multiple layers.
3Reliability
If high dopant concentration is achieved through conventional methods, then contact resistance is reduced, but leakage current increases due to thermal drive-in effects
Solution Approach 1:
The dopant concentration profile is precisely controlled through varying epitaxial growth parameters for each layer. This parameter optimization achieves high dopant concentration for low contact resistance while minimizing thermal drive-in effects that cause leakage current, thereby resolving the contradiction between contact resistance and leakage current.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The approach results in FinFET devices with high dopant concentration, high activation rate, and reduced channel resistance, while minimizing the performance penalty from thermal drive-in, thereby improving electrical performance with negligible leakage current.
Implementation Method 1
forming a source/drain region in the recess, the source/drain region including a first layer, a second layer, and a third layer, wherein forming the source/drain region includes performing a first epitaxy process under first process conditions to form the first layer in the recess
Data Source
AI summary
A method of forming a semiconductor device includes forming a fin protruding above a substrate; forming a gate structure over the fin; forming a recess in the fin adjacent to the gate structure; and forming a source/drain region in the recess, the source/drain region including a first layer, a second layer, and a third layer, where forming the source/drain region includes performing a first epitaxy process under first process conditions to form the first layer in the recess, the first layer extending along surfaces of the fin exposed by the recess; performing a second epitaxy process under second process conditions to form the second layer over the first layer; and performing a third epitaxy process under third process conditions to form the third layer over the second layer, the third layer filling the recess, where the first processing conditions, the second process conditions and the third process conditions are different.