Multi-gate FinFET with Negative Capacitor for Sub-threshold Swing Reduction
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Solution Overview
Problem
Current FinFETs face challenges in reducing Sub-threshold Swing (SS) below 60 mV/dec, which limits device performance as the devices are scaled down, and existing solutions fail to effectively manage off-current and stability.
Innovation Solution
A FinFET design incorporating a negative capacitor connected to one of its gates, which reduces total capacitance at the second gate, allowing for a Sub-threshold Swing less than 60 mV/dec by using a negative capacitance material like HfZrO2, and maintaining stability by adjusting the capacitance values of the gate capacitors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional FinFET structures are used, then device scaling is possible, but Sub-threshold Swing cannot be reduced below 60 mV/dec
Solution Approach 1:
The patent introduces a negative capacitor with negative capacitance value connected to the gate, changing the electrical parameter of the gate system. This negative capacitance compensates for the positive capacitance in the conventional structure, enabling Sub-threshold Swing to drop below the 60 mV/dec limit and achieving enhanced device performance through parameter transformation.
Solution Approach 2:
The patent combines conventional gate structures with negative capacitor elements to form a composite gate system. This composite structure integrates the benefits of conventional FinFET scaling with the enhanced electrical characteristics provided by the negative capacitor, achieving both manufacturability and improved Sub-threshold Swing performance.
2Productivity
If negative capacitor is connected to reduce Sub-threshold Swing, then device performance improves, but off-current and stability become concerns
Solution Approach 1:
The patent employs feedback mechanisms where the negative capacitor's capacitance value is carefully controlled and adjusted to provide the optimal negative feedback effect. This feedback control ensures that the Sub-threshold Swing is reduced while maintaining stability and preventing excessive off-current, achieving a balanced operation point for enhanced device performance.
Solution Approach 2:
The patent optimizes the negative capacitance value as a critical parameter to balance performance and reliability. By precisely controlling the capacitance value of the negative capacitor, the system achieves reduced Sub-threshold Swing while maintaining stable operation and acceptable off-current levels, resolving the trade-off between performance enhancement and reliability maintenance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The integration of a negative capacitor in the FinFET effectively reduces Sub-threshold Swing, enhancing device performance by minimizing off-current and achieving stable operation without hysteresis.
Implementation Method 1
the negative capacitor, which reduces total capacitance at the second gate, allowing for a Sub-threshold Swing less than 60 mV/dec
Data Source
AI summary
A multi-gate FinFET including a negative capacitor connected to one of its gates, a method of manufacturing the same, and an electronic device comprising the same are disclosed. In one aspect, the FinFET includes a fin extending in a first direction on a substrate, a first gate extending in a second direction crossing the first direction on the substrate on a first side of the fin to intersect the fin, a second gate opposite to the first gate and extending in the second direction on the substrate on a second side of the fin opposite to the first side to intersect the fin, a metallization stack provided on the substrate and above the fin and the first and second gates, and a negative capacitor formed in the metallization stack and connected to the second gate.