FinFET Gate Structure Collapse Prevention via Interfacial Oxide Layer
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Solution Overview
Problem
As FinFET devices are scaled down, the gate length reduction leads to increased complexity in manufacturing, and the first gate structure often collapses during post-etch wet cleaning and drying, necessitating a solution to prevent collapse and maintain gate integrity.
Innovation Solution
A method is introduced where an oxide layer is deposited after the first gate structure is removed and before forming the high-k/metal gate structure, using atomic layer deposition to create a conformable oxide layer that wraps over the channel region and spacer sidewalls, acting as a gate structure interfacial layer to prevent collapse and enhance gate scaling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If the gate length is scaled down, then the device area is reduced and integration density is improved, but the first gate structure collapses during post-etch wet cleaning and drying
Solution Approach 1:
An oxide layer is deposited in advance before removing the first gate structure, creating a protective interface layer that prevents collapse during subsequent wet cleaning and drying processes. This preliminary action ensures gate structure integrity is maintained throughout the fabrication sequence.
Solution Approach 2:
The oxide layer acts as an intermediary between the fin structure and the high-k gate dielectric, providing mechanical support and preventing direct contact that would cause collapse. This intermediate layer serves as a protective buffer during the gate removal and cleaning processes.
2Reliability
If a conformable oxide layer is deposited using atomic layer deposition, then gate structure reliability is improved and collapse is prevented, but manufacturing complexity increases
Solution Approach 1:
Atomic layer deposition is used to replace conventional deposition methods, providing precise conformal coverage of the oxide layer on complex 3D fin structures. This substitution enables reliable gate stack formation while maintaining process control through atomic-level precision.
Solution Approach 2:
The oxide layer thickness and composition are precisely controlled through atomic layer deposition parameters, allowing optimization of both protective function and electrical performance. By adjusting deposition conditions, the process achieves reliable gate structure formation without excessive complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for successful scaling of gate length without first gate structure collapse, reducing parasitic capacitance, improving gate stack reliability, and enhancing the scaling process in FinFET devices.
Implementation Method 1
using atomic layer deposition to create a conformable oxide layer that wraps over the channel region and spacer sidewalls
Data Source
AI summary
The present disclosure provides a fin-like field effect transistor (FinFET) device and a method of fabrication thereof. The method includes forming a fin on a substrate and forming a gate structure wrapping the fin. A pair of spacers is formed adjacent to the gate structure and the gate structure is removed. Afterwards, a pair of oxide layers is deposited adjacent to the pair of spacers. A pair of gate dielectric layers is deposited next to the pair of oxide layers. Finally, a metal gate is formed between the pair of gate dielectric layers.


