FinFET Passivation Structure Mitigating Leakage Current
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Solution Overview
Problem
The implementation of fin field effect transistors (FinFETs) in CMOS fabrication is hindered by high leakage current due to interface traps between fins and shallow-trench-isolation (STI) oxide, degrading device performance.
Innovation Solution
A passivation structure comprising silicon oxynitride, silicon germanium oxynitride, and germanium oxynitride layers is formed around the fin structure to act as a buffer layer, reducing the generation of interface traps and thereby minimizing leakage current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If shallow-trench-isolation (STI) oxide is used to isolate fins, then device isolation is achieved, but interface traps are generated between fins and STI oxide causing high leakage current
Solution Approach 1:
A passivation layer comprising silicon oxynitride, silicon germanium oxynitride, and germanium oxynitride is introduced as an intermediary between the fin structure and STI oxide. This passivation layer acts as a buffer that prevents direct contact between the fin and STI oxide, thereby eliminating interface traps and reducing leakage current while maintaining effective device isolation.
Solution Approach 2:
The passivation layer is constructed using a composite structure of multiple materials (silicon oxynitride, silicon germanium oxynitride, and germanium oxynitride) with different properties. Each material layer is selectively formed to match the underlying fin material, creating a graded interface that minimizes trap generation while providing comprehensive passivation coverage.
2Object-generated harmful factors
If a passivation structure is added around the fin structure, then leakage current is reduced, but device complexity increases
Solution Approach 1:
Different portions of the passivation layer are formed with different compositions tailored to the local fin material: silicon oxynitride for silicon fins, silicon germanium oxynitride for silicon germanium fins, and germanium oxynitride for germanium fins. This localized customization optimizes passivation effectiveness at each interface while maintaining a relatively simple overall structure that can be integrated into existing CMOS fabrication processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed solution effectively reduces high leakage current, enhancing device performance by acting as a buffer layer between the fin and STI oxide, thereby achieving low leakage characteristics.
Implementation Method 1
A passivation structure comprising silicon oxynitride, silicon germanium oxynitride, and germanium oxynitride layers is formed around the fin structure to act as a buffer layer, reducing the generation of interface traps and thereby minimizing leakage current
Data Source
AI summary
A FinFET comprises a substrate comprising a major surface; a fin structure protruding from the major surface comprising a lower fin portion comprising a first semiconductor material having a first lattice constant; an upper fin portion comprising a second semiconductor material having a second lattice constant greater than the first lattice constant; a middle fin portion comprising a third semiconductor material having a third lattice constant between the first lattice constant and the second lattice constant; and a passivation structure surrounding the fin structure comprising a lower passivation portion surrounding the lower fin portion comprising a first oxynitride of the first semiconductor material; an upper passivation portion surrounding the upper fin portion comprising a second oxynitride of the second semiconductor material; and a middle passivation portion surrounding the middle fin portion comprising a third oxynitride of the third semiconductor material.


