FinFET Fin Structure Polishing Stop With Nitrided Stress Buffer

Solution Overview

Problem

The existing fabrication procedures for fin field effect transistors (FinFETs) are complex and costly due to the need for multiple mask structures during the polishing process, which complicates the formation of thin fin structures.

Innovation Solution

A simplified mask layer approach is adopted, utilizing a stress buffer layer with a nitride portion as a polishing stop, combined with flowable chemical vapor deposition (FCVD) and atomic layer deposition (ALD) to reduce the number of mask layers required, allowing for the formation of round-like shaped silicon fins with reduced fabrication costs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If multiple mask structures are used during polishing process, then the thin fin structures can be protected, but the fabrication complexity and cost increase

Engineering Contradiction:

Improvefin structure protectionVSAvoidfabrication procedure

Core Design Contradiction:

Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent combines the stress buffer layer and mask layer into a single integrated structure. The stress buffer layer serves dual purposes: providing mechanical stress control for the silicon fin and acting as the mask layer for polishing protection, thereby reducing the number of separate layers and simplifying the fabrication process

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The stress buffer layer is designed to perform multiple functions simultaneously: it provides stress control for the silicon fin formation, serves as a mask layer during polishing, and enables selective etching. This multi-functionality eliminates the need for separate dedicated mask layers, reducing fabrication complexity

Inventive Principle:

Principle #6Universality (Multi-functionality)

2Manufacturing precision

If multiple mask structures are used during polishing process, then the thin fin structures can be protected, but the fabrication cost increases

Engineering Contradiction:

Improvefin structure protectionVSAvoidfabrication cost

Core Design Contradiction:

Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The patent combines the stress buffer layer and mask layer into a single integrated structure. The stress buffer layer serves dual purposes: providing mechanical stress control for the silicon fin and acting as the mask layer for polishing protection, thereby reducing the number of separate layers and simplifying the fabrication process

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The stress buffer layer is designed to perform multiple functions simultaneously: it provides stress control for the silicon fin formation, serves as a mask layer during polishing, and enables selective etching. This multi-functionality eliminates the need for separate dedicated mask layers, reducing fabrication complexity

Inventive Principle:

Principle #6Universality (Multi-functionality)

3Ease of manufacture

If simplified mask layer is used, then the fabrication cost is reduced, but the polishing process resistance may be insufficient

Engineering Contradiction:

Improvefabrication costVSAvoidpolishing process resistance

Core Design Contradiction:

Ease of manufactureVSReliability

Solution Approach 1:

The stress buffer layer is formed as a composite structure with a nitride portion and a silicon portion. The nitride portion provides superior polishing resistance and etch selectivity, while the silicon portion provides stress control. This composite structure maintains reliable polishing protection while simplifying the overall fabrication process

Inventive Principle:

Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method simplifies the fabrication process, reduces costs, and maintains the structural integrity and functionality of the FinFETs by using a nitride portion as a polishing stop, enabling efficient exposure of the silicon fins for subsequent processing steps.

Implementation Method 1

the nitride portion of the stress buffer layer is used as a polishing stop

Methodology Applied

Scientific EffectMaterial hardness difference:

Implementation Method 2

A nitridation treatment is performed on the stress buffer layer to have a nitride portion

Methodology Applied

Scientific EffectNitridation: Nitriding

Implementation Method 3

A flowable deposition process is performed to form a flowable dielectric layer to cover over the fin structures

Methodology Applied

Scientific EffectChemical vapor deposition: Chemical Vapour Deposition

Implementation Method 4

The flowable dielectric layer is annealed

Methodology Applied

Scientific EffectAnnealing: Annealing

Implementation Method 5

it further includes an atomic layer deposition (ALD) layer between the stress buffer layer and each of the silicon fins

Methodology Applied

Scientific EffectAtomic layer deposition:

Data Source

PatentUS11862727B2Method for fabricating fin structure for fin field effect transistor

Publication Date: 2024.01.02 UNITED MICROELECTRONICS CORP

AI summary

The invention provides a method for fabricating a fin structure for fin field effect transistor, including following steps. Providing a substrate, including a fin structure having a silicon fin and a single mask layer just on a top of the silicon fin, the single mask layer being as a top portion of the fin structure. Forming a stress buffer layer on the substrate and conformally covering over the fin structure. Performing a nitridation treatment on the stress buffer layer to have a nitride portion. Perform a flowable deposition process to form a flowable dielectric layer to cover over the fin structures. Annealing the flowable dielectric layer. Polishing the flowable dielectric layer, wherein the nitride portion of the stress buffer layer is used as a polishing stop.