FinFET Source/Drain Protection Layer for Etch Damage Control

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Solution Overview

Problem

The semiconductor industry faces challenges in forming reliable fin-like field effect transistors (FinFETs) due to the increasing difficulty of fabricating devices with decreasing feature sizes, which affects the reliability and performance of semiconductor devices.

Innovation Solution

A method for forming semiconductor devices with fin structures and epitaxially grown source/drain structures, where a semiconductor protection layer with a higher atomic concentration of silicon is grown over the source/drain structures to protect them from damage during subsequent processes, and a similar layer is used for fin structures to enhance device reliability and performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If feature sizes continue to decrease to increase functional density, then production efficiency and cost are improved, but fabrication difficulty and device reliability deteriorate

Engineering Contradiction:
Improveproduction efficiencyVSAvoidfabrication difficulty
Core Design Contradiction:
ProductivityVSEase of manufacture

Solution Approach 1:

A semiconductor protection layer is formed over the fin structure before subsequent etching and fabrication processes. This preliminary protective action prevents damage to the fin structure during manufacturing, enabling continued scaling without compromising fabrication reliability or increasing device failure rates

Inventive Principle:
Principle #10Preliminary action

2Productivity

If feature sizes continue to decrease to increase functional density, then production efficiency and cost are improved, but device reliability deteriorates

Engineering Contradiction:
Improveproduction efficiencyVSAvoiddevice reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The protection layer is formed in advance over the fin structure before etching processes, creating a preliminary shield that prevents collateral damage during subsequent manufacturing steps, thereby maintaining device reliability despite continued scaling

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The semiconductor protection layer serves as a cushioning protective barrier formed beforehand, absorbing or preventing damage during etching and cleaning processes, which cushions against reliability deterioration as feature sizes decrease

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

3Ease of manufacture

If conventional etching and cleaning processes are used without protection, then manufacturing simplicity is maintained, but damage to source/drain and fin structures occurs

Engineering Contradiction:
Improvemanufacturing simplicityVSAvoidstructure damage
Core Design Contradiction:
Ease of manufactureVSObject-affected harmful factors

Solution Approach 1:

The semiconductor protection layer acts as an intermediary protective barrier between the fin structure and harmful etching/cleaning processes. This mediator absorbs or deflects damage, allowing conventional aggressive etching and cleaning processes to proceed without causing collateral damage to the source/drain and fin structures

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The semiconductor protection layers effectively prevent damage to the source/drain and fin structures during etching and cleaning processes, improving the performance and reliability of the semiconductor device by maintaining their size and morphology.

Implementation Method 1

A semiconductor protection layer having a higher atomic concentration of silicon than the source/drain structures is grown over the source/drain structures

Methodology Applied
Scientific EffectEpitaxial growth: Epitaxy

Data Source

PatentUS12087643B2Structure and formation method of fin-like field effect transistor
Publication Date: 2024.09.10 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12087643B2 patent drawing
  • US12087643B2 patent drawing
  • US12087643B2 patent drawing

AI summary

A structure and a formation method of a semiconductor device are provided. The semiconductor device includes a semiconductor substrate and a fin structure over the semiconductor substrate. The semiconductor device also includes a gate stack covering a portion of the fin structure and an epitaxially grown source/drain structure over the fin structure and adjacent to the gate stack. The semiconductor device further includes a semiconductor protection layer over the epitaxially grown source/drain structure. The semiconductor protection layer has an atomic concentration of silicon greater than that of the epitaxially grown source/drain structure.