FinFET Replacement Gate Formation Using Raised Isolation Posts

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Solution Overview

Problem

The ongoing miniaturization of FinFET semiconductor devices poses challenges in forming replacement gate structures due to the limited space within the gate cavity, leading to issues like voids, seams, and increased difficulty in forming self-aligned contacts, which can result in reduced device performance and increased complexity in manufacturing.

Innovation Solution

The method involves forming raised isolation post structures between fins and depositing a replacement gate structure around these posts, with a thinner work function metal layer to avoid 'pinch-off' and ensure reliable filling of the gate cavity, allowing for easier etch-back processes and maintaining adequate space for protective materials.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of moving object

If the gate cavity space is reduced due to miniaturization, then device density increases, but voids and seams form in the gate stack

Engineering Contradiction:
Improvedevice densityVSAvoidgate stack quality
Core Design Contradiction:
Area of moving objectVSManufacturing precision

Solution Approach 1:

The gate cavity filling process is segmented into multiple deposition steps with intermediate etch-back operations. The work function metal layer is deposited in portions rather than as a single thick layer, allowing the cavity to be filled systematically without creating voids or seams.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The liner layer is formed on the fin surfaces before gate cavity formation, and the work function metal layer is deposited with controlled thickness in advance. These preliminary actions prepare the structure to accommodate subsequent filling steps while preventing defects.

Inventive Principle:
Principle #10Preliminary action

2Quantity of substance

If a thick work function metal layer is deposited to fill the gate cavity, then the gate structure is complete, but pinch-off occurs and filling becomes unreliable

Engineering Contradiction:
Improvework function metal layer thicknessVSAvoidgate cavity filling reliability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

Instead of depositing the full required thickness of work function metal in one step, the process uses partial deposition followed by etch-back, then additional deposition. This staged approach ensures reliable filling without causing pinch-off during any single deposition step.

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The liner layer acts as an intermediary between the fin structure and the work function metal layer. It provides a controlled interface that facilitates reliable metal deposition and prevents direct contact issues between the metal and fin surfaces.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Area of moving object

If the gate cavity is tightly filled to maximize space utilization, then device density improves, but space for protective materials becomes insufficient

Engineering Contradiction:
Improvegate cavity space utilizationVSAvoidprotective material accommodation
Core Design Contradiction:
Area of moving objectVSEase of manufacture

Solution Approach 1:

The liner layer is applied selectively to specific surfaces (fin sidewalls and bottom) rather than uniformly throughout the gate cavity. This localized application provides necessary protection and structural definition while leaving adequate space in critical areas for subsequent protective materials and gate electrode formation.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS9236480B2Methods of forming finFET semiconductor devices using a replacement gate technique and the resulting devices
Publication Date: 2016.01.12 GLOBALFOUNDRIES US INC
  • US9236480B2 patent drawing
  • US9236480B2 patent drawing
  • US9236480B2 patent drawing

AI summary

One method disclosed includes, among other things, forming a raised isolation post structure between first and second fins, wherein the raised isolation post structure partially defines first and second spaces between the first and second fins, respectively, and forming a gate structure around the first and second fins and the raised isolation post structure, wherein at least portions of the gate structure are positioned in the first and second spaces. One illustrative device includes, among other things, first and second fins, a raised isolation post structure positioned between the first and second fins, first and second spaces defined by the fins and the raised isolation post structure, and a gate structure positioned around a portion of the fins and the isolation post structure.