FinFET Single Diffusion Break Integration With Metal Gate Fabrication

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Solution Overview

Problem

The integration of single diffusion break (SDB) structure and metal gate fabrication in FinFET fabrication remains challenging, hindering the advancement of three-dimensional transistor technology.

Innovation Solution

A method involving forming a fin-shaped structure, creating a first and second gate structure, transforming them into metal gates, applying a hard mask, removing parts to form a trench, and filling it with a dielectric layer to create a single diffusion break (SDB) structure, with the SDB having a bottom and top portion of differing widths.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If shallow trench isolation (STI) is formed around the fin-shaped structure and insulating material is deposited into the trench to form single diffusion break (SDB) structure, then the isolation and diffusion control are improved, but the integration with metal gate fabrication remains problematic and complex

Engineering Contradiction:
Improveisolation and diffusion controlVSAvoidintegration complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines the SDB structure formation with the metal gate fabrication process by using the same etching and filling steps for both the gate trench and the SDB trench. The gate dielectric layer and metal layer are deposited to form both the metal gate and the SDB structure simultaneously, eliminating separate processing steps and reducing integration complexity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent creates a multi-functional processing sequence where the etching, dielectric deposition, and metal deposition steps serve dual purposes: forming the metal gate structure and forming the SDB structure. This universal approach allows a single set of process steps to achieve multiple structural objectives, simplifying the overall fabrication integration.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Length of moving object

If the fin-shaped structure is scaled down to reduce device size, then the device dimensions are reduced, but the control of channel region and suppression of short channel effects become more difficult

Engineering Contradiction:
Improvedevice sizeVSAvoidchannel control and short channel effect suppression
Core Design Contradiction:
Length of moving objectVSReliability

Solution Approach 1:

The patent transitions from planar MOSFET to FinFET three-dimensional structure, where the channel is formed on the sidewalls of the fin rather than on a flat surface. This vertical dimension provides better gate control over the channel region, effectively suppressing short channel effects even as device size is scaled down. The gate wraps around the fin structure, increasing the effective channel length without increasing the planar footprint.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS20260013207A1Semiconductor device and method for fabricating the same
Publication Date: 2026.01.08 UNITED MICROELECTRONICS CORP
  • US20260013207A1 patent drawing
  • US20260013207A1 patent drawing
  • US20260013207A1 patent drawing

AI summary

A semiconductor device includes a fin-shaped structure on a substrate, a gate structure on the fin-shaped structure and an interlayer dielectric (ILD) layer around the gate structure, and a single diffusion break (SDB) structure in the ILD layer and the fin-shaped structure. Preferably, the SDB structure includes a bottom portion and a top portion on the bottom portion, in which the top portion and the bottom portion include different widths.