FinFET SDB Structure for Metal Gate Isolation Control
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Solution Overview
Problem
Current FinFET fabrication methods face challenges in integrating single diffusion break (SDB) structures and metal gate fabrication, which affect the control of the channel region and current between the source and drain in metal oxide semiconductor transistors.
Innovation Solution
A method involving the formation of fin-shaped structures, gate structures, and interlayer dielectric layers, followed by transforming these into metal gates, forming a hard mask, and removing parts to create a trench for a dielectric layer, resulting in a single diffusion break (SDB) structure with distinct top and bottom portions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If shallow trench isolation (STI) is formed around the fin-shaped structure and insulating material is deposited into the trench to form SDB structure, then the isolation and diffusion control are improved, but the integration with metal gate fabrication becomes complex and problematic
Solution Approach 1:
The patent combines the SDB structure formation with the metal gate fabrication process by using the same trench etching and filling steps for both the metal gate and SDB structures. The metal gate and SDB are formed simultaneously in the same interlayer dielectric layer, eliminating the need for separate processing steps and reducing overall process complexity.
Solution Approach 2:
The trench structure serves dual purposes: it forms both the metal gate that controls the channel and the SDB structure that prevents diffusion. By designing the trench to accommodate both functions, the patent achieves multi-functionality where a single structural element performs multiple critical roles in device operation and fabrication.
2Productivity
If the fin-shaped structure is scaled down to reduce device size, then the device density is improved, but the control of channel region and current becomes more difficult
Solution Approach 1:
The patent transitions from planar gate control to three-dimensional FinFET structure with vertical fins extending from the substrate. This dimensional change allows the gate to control the channel from the top while the fin walls provide lateral confinement, achieving effective channel control even at scaled dimensions by utilizing the vertical dimension for current confinement.
Solution Approach 2:
The channel region is segmented into multiple fin structures rather than a single planar channel. This segmentation increases the effective channel width and control area while maintaining small footprint, allowing better current control through multiple discrete fin paths that can be independently controlled by the gate structure.
3Manufacturing precision
If the gate length is increased to improve current control, then the channel control is improved, but the device area increases
Solution Approach 1:
The patent utilizes vertical fins extending from the substrate to increase the effective channel width without increasing the planar device footprint. The channel length is effectively extended in the vertical dimension through multiple fin segments, providing enhanced gate control while maintaining a compact lateral area suitable for high-density integration.
Solution Approach 2:
The gate structure provides localized control over each individual fin channel, with the gate material and composition potentially varied locally to optimize performance for specific fin regions. This allows precise control of current in each fin segment while maintaining overall compact device geometry.
Data Source
AI summary
A semiconductor device includes a fin-shaped structure on a substrate, a gate structure on the fin-shaped structure and an interlayer dielectric (ILD) layer around the gate structure, and a single diffusion break (SDB) structure in the ILD layer and the fin-shaped structure. Preferably, the SDB structure includes a bottom portion and a top portion on the bottom portion, in which the top portion and the bottom portion include different widths.