FinFET Threshold Voltage Control via Segmented Doping and Work Function Layers
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Solution Overview
Problem
Existing techniques face difficulties in forming FinFET devices with PMOS and NMOS transistors having different threshold voltages, as doping resolution decreases with smaller critical dimensions, and forming work function layers is complex and ineffective in adjusting threshold voltages.
Innovation Solution
A method involving forming fins on a substrate with different doping concentrations for PMOS transistors and using work function layers with varying work functions for NMOS transistors, allowing for precise adjustment of threshold voltages by directly doping fins and forming distinct work function layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional doping methods are used to adjust threshold voltages, then threshold voltage adjustment is possible, but doping resolution decreases with smaller critical dimensions
Solution Approach 1:
The patent changes the parameter of threshold voltage adjustment from doping concentration control to work function control. By forming work function layers with different materials (having different work functions) on different fins, the threshold voltages are adjusted without relying on precise doping resolution, thus resolving the contradiction between threshold voltage adjustment precision and doping resolution at small critical dimensions.
2Measurement precision
If work function layers are formed to adjust threshold voltages, then threshold voltage adjustment is achieved, but the process becomes complex and ineffective
Solution Approach 1:
The patent applies local quality by forming work function layers with different materials only on specific fins that require different threshold voltages. PMOS fins receive a first work function layer material while NMOS fins receive a second work function layer material. This localized approach adjusts threshold voltages precisely where needed without making the entire process complex, as the work function layer formation is integrated into the existing gate electrode fabrication process.
3Reliability
If conventional FinFET structures are used, then device performance is maintained, but multiple-VT (different threshold voltages for PMOS and NMOS) is difficult to achieve
Solution Approach 1:
The patent segments the gate electrode into different regions corresponding to PMOS and NMOS transistors. By forming work function layers with different materials in different segments (first work function layer material on PMOS fins, second work function layer material on NMOS fins), the patent enables independent threshold voltage control for each transistor type while maintaining the overall FinFET structure integrity, thus achieving multiple-VT without compromising device performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively adjusts threshold voltages for both PMOS and NMOS transistors, improving accuracy and stability while reducing production costs and process complexity, achieving an optimal balance between process difficulty and effectiveness.
Implementation Method 1
forming a plurality of doping regions with different doping concentrations in the fins in the first region
Implementation Method 2
forming a plurality of work function layers with different work functions on the exposed fins in the openings in the second region
Data Source
AI summary
A method for forming a FinFET device is provided. The method includes providing a substrate having a first region and a second region; and forming a plurality of fins on the substrate. The method also includes forming a plurality of doping regions with different doping concentrations in the fins in the first region; and forming a plurality of dummy gate structures over the plurality of fins. Further, the method includes forming source and drain regions in the plurality of fins at both sides of the dummy gate structures; and removing the dummy gate structures to form a plurality of openings to expose the plurality of fins. Further, the method also includes forming a plurality of work function layers with different work functions on the exposed fins in the openings in the second region; and forming gate structures in the openings.