FinFET Fin Structure With Selective Doping for Punch-Through Control
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Solution Overview
Problem
Conventional multi-gate field effect transistors (FETs) face punch-through issues due to leakage currents flowing in regions not controlled by the gate, which are typically addressed by impurity implantation methods that reduce carrier mobility and affect channel strain.
Innovation Solution
The method involves forming semiconductor devices with p-type and n-type FinFETs using a substrate with fins and isolation structures, where doped material layers are used to introduce impurities through solid phase diffusion, maintaining carrier mobility and channel stress by keeping certain fin portions free of impurities, thereby controlling punch-through currents.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If heavy impurities are implanted into regions between the fin channel and the bulk substrate to overcome punch-through issue, then leakage currents are reduced, but carrier mobility is adversely reduced and channel strain is affected
Solution Approach 1:
The fin structure is divided into distinct regions: a channel region that remains free of impurities to maintain carrier mobility and channel strain, and a drift region that receives controlled impurity introduction to prevent punch-through. This segmentation allows each region to be optimized independently for its specific function.
Solution Approach 2:
Different regions of the fin structure are given different impurity concentrations tailored to their specific requirements. The channel region maintains zero or low impurity concentration for optimal carrier mobility, while the drift region receives higher impurity concentration to prevent punch-through, achieving local optimization of electrical properties.
2Reliability
If heavy impurities are implanted into regions between the fin channel and the bulk substrate to overcome punch-through issue, then leakage currents are reduced, but channel strain is adversely affected
Solution Approach 1:
The fin structure is divided into distinct regions: a channel region that remains free of impurities to maintain carrier mobility and channel strain, and a drift region that receives controlled impurity introduction to prevent punch-through. This segmentation allows each region to be optimized independently for its specific function.
Solution Approach 2:
Different regions of the fin structure are given different impurity concentrations tailored to their specific requirements. The channel region maintains zero or low impurity concentration for optimal carrier mobility, while the drift region receives higher impurity concentration to prevent punch-through, achieving local optimization of electrical properties.
3Reliability
If conventional impurity implantation methods are used to address punch-through, then leakage currents are controlled, but manufacturing complexity increases due to unavoidable impurity implantation into the whole fin
Solution Approach 1:
The harmful effect of conventional implantation methods is eliminated by extracting the impurity introduction step from a global process and replacing it with a selective local process. Only the drift region receives impurities, while the channel region remains clean, avoiding the complexity of masking and selective implantation into the entire fin structure.
Solution Approach 2:
A drift region is introduced as an intermediary structure between the channel and bulk substrate. This drift region serves as a buffer zone that handles the impurity introduction, preventing punch-through without requiring direct impurity implantation into the channel region, thereby simplifying the overall manufacturing process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively prevents punch-through currents while enhancing carrier mobility and maintaining strain in the channel regions, improving the electrical performance of FinFETs without the drawbacks of traditional impurity implantation methods.
Implementation Method 1
doped material layers are used to introduce impurities through solid phase diffusion
Implementation Method 2
performing an annealing process, thereby driving dopants from the doped material layer into the fin portions
Data Source
AI summary
A semiconductor device includes a silicon substrate; a semiconductor fin over the silicon substrate; and an isolation structure over the silicon substrate. The semiconductor fin includes a first portion and a second portion over the first portion. The first portion is surrounded by the isolation structure, and the second portion protrudes above the isolation structure. The second portion has a different crystalline lattice constant than the first portion. The first portion includes a first dopant, and the second portion is substantially free of the first dopant. The semiconductor device further includes a gate structure above the isolation structure and engaging multiple surfaces of the second portion.