FinFET Semiconductor Device With Ridge Body Region

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Solution Overview

Problem

Power transistors in automotive and industrial electronics require a balance between low on-state resistance and high voltage blocking capability, which existing semiconductor devices struggle to achieve effectively, especially in integrated circuits where components like switches and control circuits are integrated.

Innovation Solution

A semiconductor device comprising an array of field effect transistors with a source contact trench, drain contact trench, and gate electrode structures arranged in an alternating manner, where the body region is formed as a ridge extending between the source and drain regions, allowing for efficient control of conductivity and reduced leakage currents.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If the channel width is increased to reduce on-state resistance, then the device area increases

Engineering Contradiction:
Improveon-state resistanceVSAvoiddevice area
Core Design Contradiction:
Loss of energyVSArea of stationary object

Solution Approach 1:

The patent transitions from a planar channel structure to a three-dimensional FinFET structure with vertical fins extending from the substrate. This dimensional change allows the channel width to be effectively increased through the vertical fin height while maintaining a compact lateral footprint, thereby reducing on-state resistance without proportionally increasing the device area.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The channel is segmented into multiple parallel fins rather than a single planar channel. This segmentation allows the total effective channel width to be summed across all fins, achieving low on-state resistance through cumulative conductive paths while keeping each fin's lateral dimension small, thus controlling overall device area.

Inventive Principle:
Principle #1Segmentation

2Speed

If the channel length is reduced to increase switching speed, then short channel effects increase

Engineering Contradiction:
Improveswitching speedVSAvoidshort channel effects
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The FinFET structure introduces a vertical dimension to the channel, creating a three-dimensional conduction path. This allows for shorter lateral channel lengths that enable fast switching while the vertical fin structure provides enhanced gate control over the channel, suppressing short channel effects that would otherwise dominate in planar devices with short channels.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The gate structure wraps around the fin channel, providing localized and enhanced electric field control specifically at the channel region. This local quality improvement in gate control ensures that even with reduced channel length, the electric field distribution maintains proper carrier confinement and threshold voltage control, mitigating short channel effects.

Inventive Principle:
Principle #3Local quality

3Reliability

If the voltage blocking capability is increased, then the device complexity increases

Engineering Contradiction:
Improvevoltage blocking capabilityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The vertical FinFET structure provides natural voltage blocking through the drain-to-substrate junction in the vertical direction. The fin height and doping profile in the vertical dimension create an efficient depletion region for voltage blocking, achieving high breakdown voltage capability without requiring complex lateral structures or additional blocking layers that would increase device complexity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS9917163B2Semiconductor device comprising a field effect transistor and method of manufacturing the semiconductor device
Publication Date: 2018.03.13 INFINEON TECHNOLOGIES AG
  • US9917163B2 patent drawing
  • US9917163B2 patent drawing
  • US9917163B2 patent drawing

AI summary

A semiconductor device comprises a field effect transistor in a semiconductor substrate having a first main surface. The field effect transistor comprises a source region, a drain region, a body region, and a gate electrode at the body region. The gate electrode is configured to control a conductivity of a channel formed in the body region, and the gate electrode is disposed in gate trenches. The body region is disposed along a first direction between the source region and the drain region, the first direction being parallel to the first main surface. The body region has a shape of a ridge extending along the first direction, the body region being adjacent to the source region and the drain region. The semiconductor device further comprises a source contact and a body contact, the source contact being electrically connected to a source terminal, the body contact being electrically connected to the source contact and to the body region.