FinFET Sidewall Image Transfer for Fin Collapse Prevention
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Solution Overview
Problem
The miniaturization of semiconductor devices, particularly fin field effect transistors (Fin FETs), faces challenges in precisely defining fin structures and controlling etching processes due to limitations in current mask and lithography techniques, leading to issues like fin collapse and over-etching, which affect efficiency.
Innovation Solution
A method involving the formation of mandrels and patterns on a substrate, followed by the creation of a hard mask and cap layer, with subsequent etching processes to form fin-shaped structures and bases of varying sizes, allowing for precise control and improved fabrication of FinFET devices and planar MOS transistors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If current mask and lithography techniques are used to form fin structures, then the fabrication process can be completed with existing equipment, but the precision of defining fin structure position and controlling etching time is insufficient, leading to fin collapse or over-etching
Solution Approach 1:
The fabrication process is divided into multiple stages: first forming mandrels with initial patterns, then forming spacers on the mandrels, and finally using the spacers as masks for etching the fin structures. This segmentation allows each stage to be optimized independently, achieving high precision in fin structure definition while managing process complexity through modular steps.
Solution Approach 2:
Mandrels and spacers are formed in advance before the actual fin structure etching. The mandrels are formed with patterns larger than the final fin structures, and spacers are deposited on the mandrels to define the precise fin positions. This preliminary action enables precise control of etching depth and position without requiring complex real-time monitoring during the etching process.
2Reliability
If etching time is extended to ensure complete fin formation, then the fin structures can be fully formed, but over-etching occurs causing fin collapse
Solution Approach 1:
The spacer structure serves as an intermediary between the mandrel and the final fin structure. The spacer is formed with a specific thickness that corresponds to the desired fin depth, and it acts as a self-aligned mask during etching. This intermediary enables precise control of etching depth without requiring complex timing control, preventing over-etching while ensuring complete fin formation.
Solution Approach 2:
The spacer structure is self-aligned to the mandrel through conformal deposition, automatically defining the precise position and depth of the fin structures. The etching process uses the spacer as a self-aligned mask, eliminating the need for separate alignment steps and real-time etching monitoring. This self-service mechanism ensures consistent fin depth and prevents over-etching across all structures.
Data Source
AI summary
A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having a first region and a second region; forming a plurality of mandrels on the first region and a plurality of patterns on the second region, in which the widths of the patterns on the second region are greater than the widths of the mandrels on the first region; forming a hard mask on the second region to cover the patterns; and forming a cap layer on the first region and the second region to cover the mandrels and the hard mask.