FinFET Sidewall Profile Control via Dual Etching
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Solution Overview
Problem
The semiconductor industry faces challenges in achieving precise profile control of protrusion structures, such as fins in FinFET devices, due to variations in etch rates of hard masks and substrates, leading to issues like etching pull back and reduced process windows.
Innovation Solution
A method involving two etching operations is employed, where a hard mask layer is formed to protect the sidewalls of channel portions during the second etching operation, ensuring the channel portions maintain a substantially straight profile and allowing for increased etch rate without damaging the sidewalls.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a single etching operation is used to form protrusion structures, then the manufacturing process is simpler and faster, but the profile control precision deteriorates due to etch rate variations between hard mask and substrate
Solution Approach 1:
The patent divides the etching process into two separate operations: a first etching operation that forms initial protrusion structures, and a second etching operation that deepens the structures. This segmentation allows each operation to be optimized independently, with the first operation focusing on profile control and the second on depth enhancement, thereby resolving the contradiction between precision and complexity.
Solution Approach 2:
The first etching operation performs preliminary formation of protrusion structures with controlled profiles before the second etching operation deepens them. This preliminary action ensures that the basic profile control is established early, allowing subsequent operations to focus on depth without compromising profile precision.
2Productivity
If the etch rate is increased to improve productivity, then the manufacturing speed increases, but the risk of etching pull back increases and process window narrows
Solution Approach 1:
By segmenting the etching into two operations, the patent enables the second operation to use higher etch rates for productivity while the first operation ensures profile control and process stability. The separation of concerns allows each operation to be optimized for its specific function without compromising overall reliability.
Solution Approach 2:
The first etching operation establishes a stable foundation with controlled profile and appropriate etch rate, creating a preliminary structure that can withstand more aggressive processing in the second operation. This preliminary stabilization reduces the risk of pull-back effects even when higher etch rates are used subsequently.
3Manufacturing precision
If conventional single-step etching is used, then the process window is wider, but the profile control of protrusion structures deteriorates
Solution Approach 1:
The patent segments the etching process to allow the first operation to focus on profile control with optimized parameters, while the second operation handles depth enhancement. This segmentation enables each step to have its own optimized process window, achieving both precision and ease of manufacture through cumulative effects of multiple controlled steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the formation of semiconductor devices with well-controlled protrusion structures, reducing the risk of etching pull back and enhancing the process window for subsequent manufacturing steps, thereby improving the efficiency and accuracy of semiconductor device fabrication.
Implementation Method 1
a hard mask layer is formed to protect the sidewalls of channel portions during the second etching operation
Implementation Method 2
The semiconductor substrate is anisotropically etched to deepen the trench, such that the deepened trench further defines a base portion under the channel portion and the hard mask layer
Data Source
AI summary
In a method, a semiconductor substrate is etched to form a trench, such that the trench defines a channel portion. A hard mask layer is deposited over sidewalls of the channel portion. The semiconductor substrate is anisotropically etched to deepen the trench, such that the deepened trench further defines a base portion under the channel portion and the hard mask layer. The hard mask layer is removed from the sidewalls of the channel portion. The deepened trench is filled with an isolation material. The isolation material is recessed to form an isolation structure, in which the channel portion protrudes from the isolation structure.