FinFET SiGe Fin Doping Profile for Lower Junction Leakage
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Solution Overview
Problem
As the minimum feature sizes in semiconductor devices are reduced, challenges such as junction leakage and power consumption become more significant, necessitating improved doping profiles and structures in FinFET devices.
Innovation Solution
The formation of a gate spacer layer over a fin and a gate stack, followed by the implantation of dopants into the spacer layer and subsequent annealing to drive the dopants into the fin, results in a uniform dopant distribution in the channel region and a graded distribution under the source/drain regions, reducing junction leakage and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If minimum feature sizes are reduced to improve integration density, then more components can be integrated into a given area, but junction leakage and power consumption increase
Solution Approach 1:
The patent applies local quality by creating different dopant distributions in different regions of the fin structure. Specifically, the channel region receives a uniform dopant distribution to control leakage, while the source/drain regions receive a graded dopant distribution to manage carrier flow and reduce power consumption. This localized differentiation of dopant concentration profiles addresses the harmful effects of scaling without compromising integration density improvements.
Solution Approach 2:
The patent utilizes parameter changes by varying the dopant concentration and distribution profile across different fin regions. The uniform dopant distribution in the channel region contrasts with the graded distribution in source/drain regions, allowing optimization of electrical characteristics at each location. This parameter variation enables control of junction leakage and power consumption while maintaining the benefits of reduced feature sizes for high integration density.
2Productivity
If minimum feature sizes are reduced to improve integration density, then more components can be integrated into a given area, but power consumption increases
Solution Approach 1:
The patent addresses power consumption by implementing local quality through region-specific dopant distributions. The graded dopant distribution in source/drain regions optimizes carrier injection and reduces short-channel effects, thereby minimizing leakage current and associated power consumption. This localized optimization allows the device to maintain low power operation despite reduced feature sizes and higher integration density.
Solution Approach 2:
The patent employs parameter changes by adjusting dopant concentration profiles in source/drain regions to graded distributions. This parameter variation improves carrier transport efficiency and reduces off-state leakage, directly addressing power consumption concerns. The uniform dopant distribution in channel regions complements this by providing stable threshold voltage control, together enabling low-power operation at scaled dimensions for high integration density.
3Object-generated harmful factors
If uniform dopant distribution is applied in channel region, then junction leakage is reduced, but manufacturing complexity increases due to selective doping processes
Solution Approach 1:
The patent applies segmentation by dividing the fin structure into distinct regions (channel and source/drain) and applying different dopant distributions to each. This segmentation is achieved through selective doping processes that target specific regions, allowing uniform doping in the channel to reduce leakage while implementing graded doping in source/drain regions. The segmentation of doping strategies manages the complexity by addressing each region's specific electrical requirements independently.
Solution Approach 2:
The patent utilizes intermediary techniques by employing selective masking and patterning processes that act as intermediaries between the dopant source and the fin structure. These intermediary layers enable precise control over which regions receive uniform versus graded dopant distributions, facilitating leakage reduction in the channel while managing source/drain characteristics. The intermediary processes, though adding manufacturing steps, provide the necessary selectivity to achieve the desired dopant profiles.
4Use of energy by moving object
If graded dopant distribution is applied under source/drain regions, then power consumption is reduced, but manufacturing precision requirements increase
Solution Approach 1:
The patent implements local quality by applying graded dopant distribution specifically under source/drain regions while maintaining uniform distribution in channel regions. This localized approach to dopant profiling reduces power consumption by optimizing carrier transport at the source/drain interfaces where it is most critical, while avoiding the need for graded doping throughout the entire fin structure. The selective application of graded doping reduces manufacturing precision requirements compared to implementing it universally.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces junction leakage by up to fourfold and minimizes power consumption in FinFET devices, enhancing their performance and efficiency.
Implementation Method 1
subsequent annealing to drive the dopants into the fin
Implementation Method 2
subsequent annealing to drive the dopants into the fin
Implementation Method 3
implantation of dopants into the spacer layer
Data Source
AI summary
In an embodiment, a device includes: a fin on a substrate, fin having a Si portion proximate the substrate and a SiGe portion distal the substrate; a gate stack over a channel region of the fin; a source/drain region adjacent the gate stack; a first doped region in the SiGe portion of the fin, the first doped region disposed between the channel region and the source/drain region, the first doped region having a uniform concentration of a dopant; and a second doped region in the SiGe portion of the fin, the second doped region disposed under the source/drain region, the second doped region having a graded concentration of the dopant decreasing in a direction extending from a top of the fin to a bottom of the fin.