FinFET Single Diffusion Break Layout for Threshold Voltage Control
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Solution Overview
Problem
Current FinFET fabrication methods face challenges in integrating single diffusion break (SDB) structures and metal gate fabrication, leading to inefficiencies in controlling the channel region and threshold voltage of fin-shaped transistors.
Innovation Solution
A semiconductor device is fabricated with a single diffusion break structure dividing fin-shaped structures into portions, accompanied by isolation structures, spacers, and metal gates, using processes such as photo-etching, chemical mechanical polishing, and replacement metal gate processes to enhance control over the channel region and threshold voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If shallow trench isolation (STI) is formed around the fin-shaped structure and insulating material is deposited into the trench to form single diffusion break (SDB) structure, then the channel region control is improved, but the integration with metal gate fabrication remains problematic and complex
Solution Approach 1:
The patent combines the SDB structure formation with the metal gate fabrication process by depositing the metal gate material directly over the fin-shaped structure and STI regions, then performing a planarization process to expose the SDB structure. This merging of processes reduces the number of separate fabrication steps and improves integration between the SDB and metal gate components.
Solution Approach 2:
The SDB structure is formed beforehand by depositing insulating material into the STI trench before the metal gate fabrication. This preliminary formation of the SDB structure allows it to be properly positioned and prepared prior to the metal gate deposition, ensuring accurate alignment and control of the channel region while simplifying the subsequent integration process.
2Manufacturing precision
If the fin-shaped structure is divided into portions by SDB structure, then the threshold voltage control is improved, but the fabrication process becomes more complex
Solution Approach 1:
The fin-shaped structure is divided into multiple portions by forming the SDB structure that separates adjacent fins. This segmentation allows independent control of the channel regions in each portion, enabling precise threshold voltage control for each segment while maintaining a relatively simple fabrication process through standard deposition and planarization techniques.
Solution Approach 2:
The SDB structure serves multiple functions: it divides the fin-shaped structure into separate portions for independent threshold voltage control, provides electrical isolation between adjacent fins, and acts as a foundation for the subsequent metal gate deposition. This multi-functionality reduces the need for additional specialized process steps.
3Manufacturing precision
If three-dimensional FinFET structure is used to increase overlapping area between gate and fin-shaped structure, then the channel region control is improved, but the integration of SDB and metal gate fabrication remains problematic
Solution Approach 1:
The patent utilizes the vertical dimension of the three-dimensional FinFET structure by depositing the metal gate material conformally over the fin-shaped structure and STI regions, then performing planarization to expose the SDB structure. This approach leverages the vertical stacking capability of FinFETs to achieve excellent channel control while maintaining process integration simplicity through standard thin-film deposition and CMP techniques.
Data Source
AI summary
A semiconductor device includes a single diffusion break (SDB) structure dividing a fin-shaped structure into a first portion and a second portion, an isolation structure on the SDB structure, a first spacer adjacent to the isolation structure, a metal gate adjacent to the isolation structure, a shallow trench isolation (STI around the fin-shaped structure, and a second isolation structure on the STI. Preferably, a top surface of the first spacer is lower than a top surface of the isolation structure and a bottom surface of the first spacer is lower than a bottom surface of the metal gate.