FinFET Gate Electrode Sloped Bottom Proximity
Solution Overview
Problem
Existing FinFET devices face challenges in achieving uniformity in proximity and performance due to large differences in top and bottom proximities caused by vertical gate electrode structures, which can degrade device performance.
Innovation Solution
The formation of a FinFET device structure with a gate electrode having a sloped bottom portion, where the width of the bottom portion gradually increases from top to down, and an inter-layer dielectric (ILD) structure with a gradient germanium concentration, allowing for improved uniformity and performance by reducing the bottom proximity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If a vertical gate electrode structure is used in FinFET devices, then the device can achieve higher current flow and reduced short channel effect, but large differences in top and bottom proximities occur which degrade device uniformity and performance
Solution Approach 1:
The gate electrode structure transitions from a symmetric vertical configuration to an asymmetric sloped configuration. The gate electrode is formed with a sloped sidewall that angles from the substrate toward the fin top, creating different proximities at the top versus bottom of the fin. This asymmetric geometry allows optimization of the bottom proximity to reduce harmful interactions while maintaining adequate top proximity for electrical function, thereby resolving the uniformity issue without sacrificing current flow capability.
Solution Approach 2:
The gate electrode structure is designed with spatially varying properties: the sloped portion creates a larger horizontal distance (proximity) at the bottom of the fin where harmful interactions occur, while maintaining appropriate coverage at the top. This local variation in geometry allows the structure to address proximity uniformity issues in critical regions without compromising the overall gate function, enabling both high current flow and improved device uniformity.
2Power
If the gate electrode width is increased to improve current flow, then higher power and performance are achieved, but the bottom proximity becomes larger which degrades device uniformity
Solution Approach 1:
Rather than uniformly increasing gate electrode width, the invention employs asymmetric sloping where the gate electrode extends further horizontally at the bottom than at the top. This allows the bottom proximity to be optimized for uniformity while the top maintains sufficient width for current flow. The sloped configuration decouples the relationship between overall gate size and bottom proximity, enabling independent optimization of both parameters.
Solution Approach 2:
The gate electrode structure implements local geometric variation through the sloped sidewall. The horizontal extent of the gate electrode is locally adjusted: wider at the bottom to control proximity uniformly, and appropriately sized at the top for electrical performance. This local differentiation allows the structure to simultaneously achieve high current flow and uniform bottom proximity without requiring uniform width increase throughout.
Data Source
AI summary
A fin field effect transistor (FinFET) device structure and method for forming the same are provided. The FinFET device structure includes a substrate and a fin structure extending above the substrate. The FinFET device structure includes an isolation structure, and the fin structure is embedded in the isolation structure. The FinFET device structure also includes a gate structure formed on a middle portion of the fin structure. The gate structure has a top portion and bottom portion, and the bottom portion is wider than the top portion. The FinFET device structure further includes a source/drain (S/D) structure formed adjacent to the gate structure.