FinFET Source/Drain Epitaxy Below STI for Short-Channel Control
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Solution Overview
Problem
In the formation of Fin Field-Effect Transistors (FinFETs), the epitaxy regions grown from neighboring semiconductor fins often merge, leading to planar top surfaces, which can result in the short channel effect, making it challenging to control dopant diffusion and electrical connectivity.
Innovation Solution
The source/drain regions of FinFETs are extended below the top surfaces of Shallow Trench Isolation (STI) regions, with a multi-layer epitaxy process that includes forming epitaxy layers with varying dopant concentrations and shapes, such as wavy or cone-shaped profiles, to reduce the short channel effect and enhance electrical performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If epitaxy regions are grown from recesses of neighboring semiconductor fins, then source/drain regions are formed, but the epitaxy regions merge and form planar top surfaces that cause short channel effect
Solution Approach 1:
The patent extends the epitaxy regions in the vertical dimension below the STI top surfaces, creating a depth-based differentiation. This vertical extension allows the source/drain regions to protrude into the STI regions, transforming the problem from a 2D planar merging issue to a 3D structured solution where depth controls electrical characteristics while reducing short channel effects
Solution Approach 2:
The patent creates non-uniform dopant concentration distributions within the epitaxy regions, with different dopant levels at different locations (e.g., higher concentration near the fin, lower concentration extending into STI). This local quality variation allows optimization of electrical performance in different regions while maintaining structural integrity and reducing short channel effects
2Manufacturing precision
If epitaxy regions are extended below STI regions, then dopant diffusion control is improved, but manufacturing complexity increases
Solution Approach 1:
The patent performs preliminary actions by forming the multi-layer epitaxy structure with varying dopant concentrations before subsequent processing steps. The epitaxy regions are grown with predetermined dopant profiles and geometric configurations that pre-establish dopant diffusion pathways and electrical characteristics, reducing the need for complex post-processing adjustments
Solution Approach 2:
The patent divides the epitaxy formation into multiple sequential layers with different dopant concentrations and material compositions. This segmentation allows independent optimization of each layer's properties, enabling precise control of dopant diffusion while breaking down the complex manufacturing process into manageable, repeatable steps
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for better control of dopant diffusion, reduces the short channel effect, and improves the electrical performance of FinFETs by extending the epitaxy regions below the STI surfaces, enabling more efficient stress application and dopant activation.
Implementation Method 1
growing epitaxy regions starting from the recesses
Data Source
AI summary
A method includes forming isolation regions extending into a semiconductor substrate, forming a plurality of semiconductor fins protruding higher than top surfaces of the isolation regions, forming a gate stack on the plurality of semiconductor fins, forming a gate spacer on a sidewall of the gate stack, and recessing the plurality of semiconductor fins to form a plurality of recesses on a side of the gate stack. The plurality of recesses extend to a level lower than top surfaces of the isolation regions. Epitaxy processes are performed to grow an epitaxy region, wherein the epitaxy region fills the plurality of recesses.