Source/Drain Junction Formation in FinFETs
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Solution Overview
Problem
The challenge in semiconductor manufacturing is forming ultra shallow junctions in FinFETs, which can lead to undesirable consequences such as increased sheet resistance and device yield issues due to the processing steps used for source and drain region formation.
Innovation Solution
The process involves forming recesses in the substrate, using epitaxy to grow n-type or p-type semiconductor materials, followed by pre-amorphization doping with helium and phosphorous or boron using plasma doping, and subsequent annealing to recrystallize the source/drain regions, while forming a silicide layer to achieve a suitable concentration and abruptness of dopants, thereby minimizing sheet resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional processing steps are used to form source and drain regions in FinFETs, then the manufacturing process is simpler, but sheet resistance increases and device yield deteriorates
Solution Approach 1:
The source and drain region formation is divided into multiple sequential steps: forming recesses in the substrate, performing pre-amorphization doping with first dopants, forming a semiconductor layer, and performing second doping. This segmentation allows each step to be optimized independently, achieving ultra shallow junctions with controlled dopant concentrations and abruptness while maintaining manufacturing feasibility
Solution Approach 2:
Pre-amorphization doping is performed before forming the semiconductor layer and before the main doping step. This preliminary action modifies the substrate structure in advance to enable subsequent dopant diffusion to achieve the desired ultra shallow junction profile with abrupt transitions and controlled sheet resistance
2Reliability
If ultra shallow junctions are formed with high dopant concentration and abruptness, then sheet resistance is reduced, but the processing precision required increases
Solution Approach 1:
The doping process uses multiple dopant types (first dopants and second dopants) with different concentrations and diffusion characteristics. By changing dopant parameters (type, concentration, energy) between steps, the process achieves ultra shallow junctions with abrupt transitions and optimized sheet resistance while maintaining manufacturing precision
Solution Approach 2:
The patent replaces conventional thermal diffusion processes with plasma doping (ion implantation) to achieve precise dopant placement. This substitution allows better control over dopant concentration and distribution, enabling abrupt junction profiles with reduced sheet resistance while maintaining manufacturing precision
3Reliability
If the source and drain regions are formed deeper, then dopant concentration can be lower, but the junction depth increases and device performance deteriorates
Solution Approach 1:
Recesses are formed in the substrate before doping to define the exact depth and shape of the future source and drain regions. This preliminary action ensures that dopants are confined to the desired ultra shallow depth range, achieving abrupt junctions with peak concentrations at controlled depths (e.g., 5-15 nm) that optimize device performance
Solution Approach 2:
The doping process creates highly localized dopant distributions with peak concentrations at specific depths within the recesses. Different dopant concentrations are achieved at different locations (depths) within the source and drain regions, with abrupt transitions that maintain low junction depth while achieving the required electrical characteristics for optimal device performance
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the formation of ultra shallow junctions with reduced sheet resistance and improved device yield by achieving a desired concentration and abruptness of dopants at specific depths, enhancing the performance of FinFETs and other semiconductor devices.
Implementation Method 1
epitaxially growing a semiconductor material in the recesses
Implementation Method 2
annealing to recrystallize the source/drain regions
Implementation Method 3
doping the semiconductor material with phosphorous or boron using plasma doping
Data Source
AI summary
A method includes forming a first channel region and a first gate structure formed over the first channel region. A first source/drain region is formed adjacent the first channel region and the first source/drain region includes a crystalline structure doped with a first dopant. A first silicide is formed over the first source/drain region. The first source/drain region includes a first concentration of the first dopant between 2.0×1021 atoms per centimeter cubed and 4.0×1021 atoms per centimeter cubed at a depth of 8 to 10 nanometers.