FinFET Source Drain Segmentation for Low Contact Resistance

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

FinFET devices face increased contact resistance between the source/drain and channel regions, leading to reduced channel current and increased leakage current due to dopant diffusion into the channel region, which worsens as devices scale down.

Innovation Solution

A method involving the formation of recesses on either side of the gate structure, with a spacer layer etched to expose surface portions of the semiconductor substrate, allowing for the deposition of higher-doping concentration source and drain portions that cover the exposed areas, reducing contact resistance and preventing dopant diffusion into the channel.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If source/drain doping is increased to reduce contact resistance, then contact resistance decreases, but dopant diffusion into the channel region increases causing unwanted doping

Engineering Contradiction:
Improvecontact resistanceVSAvoiddopant diffusion into channel region
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The source and drain structures are divided into multiple segments: a first source/drain portion filling the recess and a second source/drain portion formed on top. The second portion has higher doping concentration specifically at the contact interface to reduce contact resistance, while the first portion has lower doping concentration to minimize dopant diffusion into the channel region. This segmentation allows different doping concentrations in different spatial regions of the same source/drain structure.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the source/drain structure are given different doping concentrations according to their specific functional requirements. The upper surface region (second source/drain portion) has high doping concentration to reduce contact resistance at the contact interface, while the lower region near the channel (first source/drain portion) has low doping concentration to prevent dopant diffusion into the channel. This local quality variation optimizes both contact resistance and dopant diffusion control.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively reduces contact resistance and enhances channel current by increasing the contact area between the source/drain and channel, while preventing unwanted doping of the channel region, thereby improving the overall performance of FinFET devices.

Implementation Method 1

etching a portion of a sidewall of the spacer layer on at least one side of the gate to expose a surface portion of the semiconductor substrate

Methodology Applied
Scientific EffectEtching:

Data Source

PatentUS10985276B2Method and device having low contact resistance
Publication Date: 2021.04.20 SEMICON MFG INT (SHANGHAI) CORP
  • US10985276B2 patent drawing
  • US10985276B2 patent drawing
  • US10985276B2 patent drawing

AI summary

A method for manufacturing a semiconductor device includes providing a semiconductor structure having a semiconductor substrate and a gate structure on the semiconductor substrate. The gate structure includes a gate dielectric layer on the semiconductor substrate, a gate on the gate dielectric layer, and a spacer layer on opposite sides of the gate. The method also includes etching the semiconductor substrate to form first and second recesses, etching a portion of the spacer layer to expose a surface portion of the semiconductor substrate, and forming a source filling the first recess and a drain filling the second recess. The source (drain) includes a first source (drain) portion in the first (second) recess and a second source (drain) portion on the first source (drain) portion. The second source portion or the second drain portion covers the exposed surface portion of the semiconductor substrate.