FinFET Source Drain Segmentation for Current Crowding Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current semiconductor technologies face challenges in reducing current crowding at the source and drain of FinFET transistors, which hinders the increase in transistor current drive ability and performance, especially as the industry advances to nanometer technology nodes.
Innovation Solution
The manufacturing process involves forming fin structures over a substrate, using a gate replacement technology with a dummy gate structure, followed by the formation of metal layers, amorphous layers, and recrystallization to create a uniform recrystallized layer and silicide layers, which reduces contact resistance and increases packing density in the source/drain structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional source/drain formation methods are used in nanometer FinFET transistors, then manufacturing process simplicity is maintained, but current crowding at source and drain increases, reducing current drive ability
Solution Approach 1:
The source/drain structure is segmented into multiple regions with different materials and doping concentrations. The channel region, transition region, and contact region are distinctly separated, allowing each to be optimized independently. This segmentation enables reduced current crowding by creating gradual transitions and multiple current pathways through the doped Fin structures.
Solution Approach 2:
Different regions of the source/drain structure are assigned different local properties: the channel region has one doping concentration, the transition region has intermediate doping, and the contact region has high doping. This local quality variation optimizes current distribution and reduces current crowding at critical interfaces while maintaining overall device performance.
2Reliability
If source and drain are formed in recessed fin by epitaxial growth, then device structure is achieved, but contact resistance remains high, limiting performance improvement
Solution Approach 1:
The method performs preliminary doping and structural formation before final contact creation. By pre-forming the doped Fin structures with appropriate doping gradients, the subsequent contact formation achieves lower contact resistance without requiring complex in-situ doping during contact fabrication, thus reducing overall process complexity.
Solution Approach 2:
The invention changes key parameters including doping concentration gradients, Fin structure dimensions, and material compositions across different regions. These parameter variations enable optimized current flow and reduced contact resistance while maintaining manufacturability through standard semiconductor processing techniques.
3Reliability
If metal gate structure with high-k material is used, then transistor performance is improved, but fabrication complexity increases due to gate replacement technology requirements
Solution Approach 1:
The gate structure is segmented into the metal gate electrode and the high-k dielectric layer as distinct functional components. This segmentation allows independent optimization and fabrication of each layer, simplifying the overall gate replacement process while maintaining the performance benefits of high-k materials and metal gates.
4Productivity
If higher device density is pursued, then transistor packing increases, but current crowding at source/drain becomes more severe, reducing effective current drive
Solution Approach 1:
The invention utilizes the vertical dimension of the Fin structure to create multiple current pathways. By doping the Fin structures vertically and creating graded doping profiles through the Fin height, the design effectively adds a dimensional aspect to current flow, distributing current across multiple vertical paths and reducing lateral current crowding even at high device densities.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces contact resistance and enhances the current drive ability of FinFET transistors, allowing for improved performance and higher packing density, thereby addressing the current crowding issue.
Implementation Method 1
partially recrystallizing the amorphous layer on the fin structure to form a uniform recrystallized layer
Implementation Method 2
Silicide layers are formed by a silicide reaction between the recrystallized layer and the first metal layers and the second metal layer
Data Source
AI summary
A semiconductor device includes a fin structure disposed over a substrate, a gate structure and a source. The fin structure includes an upper layer being exposed from an isolation insulating layer. The gate structure disposed over part of the upper layer of the fin structure. The source includes the upper layer of the fin structure not covered by the gate structure. The upper layer of the fin structure of the source is covered by a crystal semiconductor layer. The crystal semiconductor layer is covered by a silicide layer formed by Si and a first metal element. The silicide layer is covered by a first metal layer. A second metal layer made of the first metal element is disposed between the first metal layer and the isolation insulating layer.