FinFET Spacer Formation via In-Situ Etching and Protection
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Solution Overview
Problem
Current FinFET processes face issues with serious spacer pull down and unwanted dielectric material remaining at the sidewall of fin structures, which can expose the gate conductive layer and compromise the performance and reliability of semiconductor devices.
Innovation Solution
A method involving multiple etching processes, including a first etching process to form a gate spacer and a second etching process to remove unwanted spacer material, with a protective layer formed in-situ to prevent spacer pull down, all performed in the same reaction chamber to save time and ensure accurate spacer formation without exposing the gate conductive layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a high removal rate etchant or long etching process time is used to remove unwanted dielectric material at the fin sidewall, then the removal of unwanted spacer material is improved, but serious spacer pull down occurs causing gate conductive layer exposure
Solution Approach 1:
The etching process is divided into two distinct stages: a first etching process that forms the gate spacer with controlled removal, and a second etching process that removes unwanted spacer material at the fin sidewall. This segmentation allows each process to be optimized independently, preventing the need to use excessively aggressive etching conditions that would cause spacer pull down while still achieving complete removal of unwanted material.
Solution Approach 2:
The first etching process performs the preliminary action of forming the gate spacer with sufficient material remaining to prevent pull down during subsequent processing. This preliminary formation ensures that when the second etching process removes unwanted material, the gate spacer maintains its structural integrity and prevents gate conductive layer exposure.
2Manufacturing precision
If multiple separate processing steps are used to form gate spacer and remove unwanted material, then the precision of spacer formation is improved, but the manufacturing time increases
Solution Approach 1:
The first etching process and the protective layer formation process are merged into a single continuous operation performed in the same reaction chamber. This merging maintains the precision of spacer formation while eliminating the need for chamber evacuation and re-introduction between steps, thereby reducing manufacturing cycle time without sacrificing spacer formation accuracy.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively prevents spacer pull down and removes unwanted spacer material, ensuring proper formation of the gate spacer beside the gate structure and enhancing the reliability and performance of semiconductor devices by maintaining the integrity of the gate conductive layer.
Implementation Method 1
a first etching process is performed to remove apart of the dielectric layer to form a first spacer surrounding the gate structure and a second spacer surrounding a sidewall of the fin structure
Implementation Method 2
a protective layer is formed in-situ to cover the gate structure and the first spacer
Implementation Method 3
a second etching process is performed to remove a part of the protective layer and totally remove the second spacer
Data Source
AI summary
A method of forming a semiconductor device includes the following steps. At least a fin structure is provided on a substrate and a gate structure partially overlapping the fin structure is formed. Then, a dielectric layer is formed on the substrate. Subsequently, a first etching process is performed to remove apart of the dielectric layer to form a first spacer surrounding the gate structure and a second spacer surrounding a sidewall of the fin structure, and a protective layer is formed in-situ to cover the gate structure and the first spacer. Finally, a second etching process is performed to remove a part of the protective layer and totally remove the second spacer.