FinFET Bottom Spacer Tapering for Capacitance Reduction
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Solution Overview
Problem
Existing FinFET devices face challenges in achieving optimal gate edge-to-device channel positioning and reducing gate-to-source/drain capacitances, particularly due to mismatches in vertical gate edge positioning relative to the junction of the vertical fin with the bottom source/drain.
Innovation Solution
A method involving the formation of a bottom spacer layer with a non-uniform thickness that tapers towards the thinned vertical fins, achieved through directional deposition processes, where the overhanging fin templates shadow regions adjacent to the vertical fins, reducing spacer layer material deposition and enhancing gate control.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a uniform thickness bottom spacer layer is used, then the manufacturing process is simpler, but the gate edge-to-device channel positioning is suboptimal and gate-to-source/drain capacitance is higher
Solution Approach 1:
The bottom spacer layer is designed with non-uniform thickness, where the thickness varies in the direction towards the vertical fins. This local variation in spacer thickness allows for precise control of gate edge positioning relative to the device channel while maintaining a relatively simple overall structure. The spacer layer is thicker in regions requiring greater spacing and thinner in regions where closer positioning is desired.
Solution Approach 2:
The bottom spacer layer with non-uniform thickness is formed before the gate structure is created. This preliminary action establishes the desired gate edge-to-channel positioning in advance, allowing subsequent processing steps to proceed without complex adjustments. The spacer layer serves as a pre-formed template that defines the final gate position.
2Reliability
If the bottom spacer layer thickness is increased, then the gate control is improved, but the gate-to-source/drain overlap capacitance increases
Solution Approach 1:
The bottom spacer layer employs local quality variation by having different thicknesses in different regions. In regions adjacent to source/drain junctions, the spacer is thinner to reduce overlap capacitance, while in channel regions, the spacer provides adequate thickness for proper gate control. This spatially varying thickness optimizes both gate control and capacitance reduction simultaneously.
Solution Approach 2:
The thickness parameter of the bottom spacer layer is changed continuously or in steps across different regions of the device. By adjusting the thickness parameter locally rather than maintaining a constant value, the design achieves optimal gate control where needed while minimizing capacitive coupling in other regions. This parameter variation is achieved through controlled deposition processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves gate edge-to-device channel positioning and reduces overlap capacitance between the gate and source/drain, leading to better control and performance in FinFET devices.
Implementation Method 1
the overhanging fin templates shadow regions adjacent to the vertical fins, reducing spacer layer material deposition
Data Source
AI summary
A method of forming a fin field effect transistor device is provided. The method includes forming a vertical fin layer on a bottom source/drain layer, and forming one or more fin templates on the vertical fin layer. The method further includes forming a vertical fin below each of the one or more fin templates. The method further includes reducing the width of each of the vertical fins to form one or more thinned vertical fins, wherein at least a portion of the fin template overhangs the sides of the underlying thinned vertical fin. The method further includes depositing a bottom spacer layer on the bottom source/drain layer, wherein the bottom spacer layer has a non-uniform thickness that tapers in a direction towards the thinned vertical fins.