Step-Sided FinFET Contact Plugs for Lower Resistance and Capacitance
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Solution Overview
Problem
The increasing demand for high-performance, high-speed, and multi-functional semiconductor devices has led to the need for finer patterns and three-dimensional channel structures, such as FinFETs, to overcome the limitations of planar metal oxide semiconductor FETs.
Innovation Solution
A semiconductor device is designed with an active fin extending in a first direction on a substrate, a gate electrode intersecting the active fin in a second direction, source/drain regions on both sides of the gate electrode, and a contact plug with a side having a step portion extending in the second direction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional planar MOSFET structures are used, then manufacturing is simpler, but device performance and integration density are limited
Solution Approach 1:
The patent transitions from planar 2D channel structures to three-dimensional FinFET structures with vertical fins extending from the substrate. This dimensional change increases the effective channel area and integration density while maintaining manufacturability through established semiconductor processing techniques adapted for 3D geometries.
2Productivity
If contact plugs are made smaller for finer patterns, then integration density improves, but contact resistance increases
Solution Approach 1:
The contact plug structure incorporates a step portion that extends in the second direction (transverse to the fin length), creating an elongated contact area. This dimensional extension increases the contact surface area without increasing the footprint in the first direction (fin length), thereby reducing contact resistance while maintaining fine pattern integration density.
Solution Approach 2:
The contact plug features a non-uniform geometry with a step portion that creates different contact areas at different locations. The elongated section provides enhanced contact area specifically where needed for low resistance, while other portions maintain compact dimensions for high integration density.
3Speed
If parasitic capacitance is reduced for high-speed performance, then device speed improves, but contact area may be reduced
Solution Approach 1:
The step portion extends the contact plug in the second direction (transverse to fin length) rather than increasing the contact area in the first direction (along fin length). This directional extension reduces parasitic capacitance with the gate electrode while providing sufficient contact area for low contact resistance, enabling high-speed device operation.
Data Source
AI summary
A semiconductor device includes an active fin extending in a first direction on a substrate, a gate electrode intersecting the active fin and extending in a second direction, source/drain regions disposed on the active fin on both sides of the gate electrode, and a contact plug disposed on the source/drain regions. The contact plug has at least one side extending in the second direction which has a step portion having a step shape.