FinFET Strained Channel Fabrication via Self-Limiting Etch

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Solution Overview

Problem

The challenge in forming finFETs is controlling the etch-back of fins to achieve uniform channel strain, as over-etching or under-etching can lead to insufficient strain, and variations in etch-back across a wafer or chip result in non-uniform performance.

Innovation Solution

The method involves forming one or more layers over a semiconductor fin, with etching limited by these layers to control the fin height and strain, using self-limiting techniques to ensure uniformity and tolerance to variations in etch rate, and depositing strain-inducing materials at source and drain regions to impart strain to the channel.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional etching methods are used to etch back fins, then the etching process can be completed, but the fin heights become non-uniform and channel strain is insufficient

Engineering Contradiction:
Improvefin height uniformityVSAvoidetching process efficiency
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The etching process is designed to be self-limiting, where the etch reaction automatically stops when the fin reaches the desired height, determined by the thickness of the overlying layers. This self-service mechanism eliminates the need for complex real-time monitoring and control systems, achieving both high precision and efficiency simultaneously

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent changes the etching parameters by using selective etch rates between different materials (fin material vs. overlying layers) and controlling the etch depth relative to layer thickness. This parameter transformation converts a difficult-to-control absolute depth etching into a more controllable relative depth etching, improving both precision and processability

Inventive Principle:
Principle #35Parameter changes

2Reliability

If over-etching is performed to ensure sufficient strain, then more strain can be applied, but fin height uniformity deteriorates and performance varies across the wafer

Engineering Contradiction:
Improvechannel strain consistencyVSAvoidfin height control
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The self-limiting etch mechanism ensures that the etching process automatically terminates at the correct depth without human intervention or complex control systems. The process inherently prevents both over-etching and under-etching, maintaining fin height uniformity while applying the required strain consistently across the entire wafer

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The etching process incorporates implicit feedback through the self-limiting mechanism, where the etch reaction rate is naturally modulated by the proximity to the target depth. This feedback loop ensures that the desired fin height and strain are achieved uniformly across all fins on the wafer, eliminating performance variations

Inventive Principle:
Principle #23Feedback

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach ensures more uniform heights of etched fins and applied strain, improving finFET performance by maintaining consistent channel strain across the device, thereby enhancing the finFET's operational consistency and efficiency.

Implementation Method 1

the etching of the fin is self-limited by at least a level of one of the one or more layers and by a width of an opening defined by the fin

Methodology Applied
Scientific EffectSelf-limited etching:

Implementation Method 2

channel strain may be induced by straining the FET's source and/or drain regions, such that the strain is transferred through the source and/or drain regions to the channel

Methodology Applied
Scientific EffectStrain transfer:

Data Source

PatentUS9391200B2FinFETs having strained channels, and methods of fabricating finFETs having strained channels
Publication Date: 2016.07.12 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US9391200B2 patent drawing
  • US9391200B2 patent drawing
  • US9391200B2 patent drawing

AI summary

Techniques and structures for controlling etch-back of a finFET fin are described. One or more layers may be deposited over the fin and etched. Etch-back of a planarization layer may be used to determine a self-limited etch height of one or more layers adjacent the fin and a self-limited etch height of the fin. Strain-inducing material may be formed at regions of the etched fin to induce strain in the channel of a finFET.