FinFET Strained Source Drain Epitaxy for Carrier Mobility

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Solution Overview

Problem

Existing FinFET devices and manufacturing methods face challenges in achieving optimal carrier mobility and strain distribution in the channel region, limiting their performance and efficiency.

Innovation Solution

A method for fabricating FinFET devices involves forming a fin structure, depositing a dielectric layer, and etching to expose sidewalls, followed by epitaxial growth of strained semiconductor material in source and drain regions to increase the surface area and induce strain, enhancing carrier mobility.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If existing FinFET manufacturing methods are used, then device fabrication is achieved, but carrier mobility and strain distribution in the channel region are not optimized

Engineering Contradiction:
Improvecarrier mobilityVSAvoidstrain distribution
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent applies local quality by forming strained semiconductor material specifically in the source and drain regions adjacent to the channel, while leaving the channel region itself with different properties. This localized strain engineering enhances carrier mobility in the channel without requiring overall restructuring of the device, thus improving reliability while maintaining manufacturing feasibility.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the physical and chemical parameters of the semiconductor material by epitaxially growing strained material with different lattice constants than the substrate. This parameter change (strain) is applied selectively to modify carrier mobility in the channel region, resolving the contradiction between achieving high mobility and maintaining precise strain distribution control.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If geometry size is decreased to increase device density, then production efficiency increases, but processing complexity increases

Engineering Contradiction:
Improvedevice densityVSAvoidprocessing complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent segments the semiconductor structure into distinct regions: an unstressed channel region and strained source/drain regions. This segmentation allows each region to be optimized independently for its specific function, enabling smaller geometry sizes and higher device density without proportionally increasing overall processing complexity, as the strain engineering is applied in a modular fashion.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method results in FinFET devices with increased carrier mobility due to larger strained surface areas in the channel region, improving current flow direction, and is easily integratable into current processing techniques.

Implementation Method 1

epitaxial growth of strained semiconductor material in source and drain regions

Methodology Applied
Scientific EffectEpitaxy: Epitaxy

Data Source

PatentUS9806076B2FinFET device and method of manufacturing same
Publication Date: 2017.10.31 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US9806076B2 patent drawing
  • US9806076B2 patent drawing
  • US9806076B2 patent drawing

AI summary

A semiconductor device and method for fabricating a semiconductor device is disclosed. An exemplary semiconductor device includes a substrate including a fin structure disposed over the substrate. The fin structure includes one or more fins. The semiconductor device further includes an insulation material disposed on the substrate. The semiconductor device further includes a gate structure disposed on a portion of the fin structure and on a portion of the insulation material. The gate structure traverses each fin of the fin structure. The semiconductor device further includes a source and drain feature formed from a material having a continuous and uninterrupted surface area. The source and drain feature includes a surface in a plane that is in direct contact with a surface in a parallel plane of the insulation material, each of the one or more fins of the fin structure, and the gate structure.