FinFET Stress Liner Segmentation for Carrier Mobility

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Solution Overview

Problem

Integrated circuit (IC) devices face challenges in optimizing carrier mobility in channel regions of different conductive types, which affects the performance and efficiency of transistors.

Innovation Solution

The IC device design includes fin-shaped channel regions with specific stress liner and insulation layer structures, where the first and second stress liners are connected and made of different materials, and an insulation layer is used between them, enhancing carrier mobility by applying stress to the channel regions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a single stress liner structure is used for both N-type and P-type channel regions, then the device complexity is reduced, but the carrier mobility cannot be independently optimized for different conductive types

Engineering Contradiction:
Improvecarrier mobility optimizationVSAvoidstress liner structure
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The stress liner structure is segmented into first and second stress liners that are selectively formed on opposite sides of the fin-shaped channel region. The first stress liner is formed on the first side for N-type channels while the second stress liner is formed on the second side for P-type channels, allowing independent optimization of carrier mobility for different conductive types without requiring a completely separate structure for each type.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different stress liner materials and configurations are applied to different sides of the fin-shaped channel region based on the local requirements. The first stress liner material is selected to enhance carrier mobility in N-type channels, while the second stress liner material is selected to enhance carrier mobility in P-type channels, achieving local optimization rather than uniform treatment.

Inventive Principle:
Principle #3Local quality

2Reliability

If stress liners are formed on all sides of the fin-shaped channel region, then carrier mobility is enhanced, but the manufacturing precision requirements increase due to asymmetric slope changes

Engineering Contradiction:
Improvecarrier mobility enhancementVSAvoidsidewall slope control
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

Instead of forming stress liners on all sides of the fin-shaped channel region, the invention applies stress liners selectively only on the first and second sides where channel formation occurs. The third and fourth sides are left without stress liners, reducing the manufacturing precision requirements for sidewall slope control while still achieving the necessary carrier mobility enhancement in the active channel regions.

Inventive Principle:
Principle #16Partial or excessive action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design independently enhances carrier mobility in channel regions, improving the performance of transistors by applying tailored stress to N-type and P-type channels, leading to improved operational speed and accuracy.

Implementation Method 1

a stress liner between the insulation liner and the insulation layer... independently enhances carrier mobility in channel regions of different conductive types... applying tailored stress to N-type and P-type channels

Methodology Applied
Scientific EffectStress-induced carrier mobility enhancement: Piezoresistive Effect

Data Source

PatentUS10103142B2Integrated circuit (IC) devices including stress inducing layers
Publication Date: 2018.10.16 SAMSUNG ELECTRONICS CO LTD
  • US10103142B2 patent drawing
  • US10103142B2 patent drawing
  • US10103142B2 patent drawing

AI summary

Integrated circuit devices are provided. The devices may include first and second fin-shaped channel regions protruding from a substrate, and the first and second fin-shaped channel regions may define a recess therebetween. The devices may also include an isolation layer in a lower portion of the recess. The isolation layer may include a first stress liner extending along a side of the first fin-shaped channel region, a second stress liner extending along a side of the second fin-shaped channel region and an insulation liner between the first stress liner and the side of the first fin-shaped channel region and between the second stress liner and the side of the second fin-shaped channel region. The devices may further include a gate insulation layer on surfaces of upper portions of the first and second fin-shaped channel regions and a gate electrode layer on the gate insulation layer.