FinFET Super Well Doping Profile for Punch-Through and Mobility

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Solution Overview

Problem

Current FinFET device manufacturing processes face challenges with damage from anti-punch through APT imp doping and poor carrier mobility due to uneven doping concentrations along the fin structure, particularly at the bottom where the fin is wider and more heavily doped, hindering electrostatic integrity and device performance.

Innovation Solution

A method for forming a FinFET super well involves creating a deep N-well and well region in a silicon substrate, followed by ion implantation steps to adjust threshold voltage and prevent punch-through, with a hard mask layer protecting the fin top from damage, and subsequent annealing to diffuse ions laterally and longitudinally, enhancing carrier mobility.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If anti-punch through APT imp doping is performed by implantation, then punch-through risk is reduced, but damage occurs to the fin structure

Engineering Contradiction:
Improvepunch-through preventionVSAvoidion implantation damage
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The fin structure is divided into multiple height zones (first height with hard mask protection, second height without protection). Different ion implantation conditions are applied to each zone: the top portion receives protected implantation with reduced damage, while the bottom portion receives unprotected implantation for effective punch-through prevention. This segmentation allows simultaneous achievement of both protection and effectiveness.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the fin structure are given different doping qualities. The top region (first height) is protected by hard mask layer to minimize damage, while the bottom region (second height) is intentionally exposed to ion implantation for maximum punch-through prevention effect. Each region receives tailored treatment according to its specific functional requirements.

Inventive Principle:
Principle #3Local quality

2Reliability

If doping concentration is increased at the fin bottom to prevent punch-through, then punch-through risk is reduced, but carrier mobility decreases

Engineering Contradiction:
Improvepunch-through preventionVSAvoidcarrier mobility
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The doping concentration is locally optimized for different fin regions. The bottom region receives higher doping concentration to prevent punch-through, while the top region maintains lower doping concentration to preserve carrier mobility. This local differentiation allows each region to operate at its optimal doping level without compromising the other.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The fin structure is segmented into different height zones with distinct doping characteristics. The bottom portion (second height) is selectively doped with higher concentration for punch-through prevention, while the top portion (first height) maintains lower concentration for mobility. This vertical segmentation creates non-uniform doping profile that satisfies both requirements.

Inventive Principle:
Principle #1Segmentation

3Productivity

If the fin width is narrower at the top, then device scaling is improved, but the risk of punch-through increases at the bottom

Engineering Contradiction:
Improvedevice scalingVSAvoidpunch-through risk
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

Different regions of the fin structure are given different doping concentrations matched to their local geometry. The narrow top region maintains low doping for mobility, while the wider bottom region receives high doping for punch-through prevention. This local quality adjustment compensates for the geometric vulnerability at the bottom without compromising top-region performance.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method increases carrier mobility and improves device performance by forming a FinFET super well that avoids punch-through defects, resulting in enhanced electrostatic integrity and performance.

Implementation Method 1

there is no ion implantation damage to the top of the fin structure due to the existence of the hard mask layer

Methodology Applied
Scientific EffectPhysical barrier (hard mask layer):

Implementation Method 2

the first and the second ion implantation layers in the plurality of fin structures respectively diffuse laterally into a full width regions of each of the plurality fin structures, as well as diffuse longitudinally into the well region and the deep N-well

Methodology Applied
Scientific EffectIon diffusion: Diffusion

Implementation Method 3

performing annealing treatment, wherein the first and the second ion implantation layers in the plurality of fin structures respectively diffuse

Methodology Applied
Scientific EffectThermal annealing: Annealing

Data Source

PatentUS12136551B2Method for forming FinFET super well
Publication Date: 2024.11.05 SHANGHAI HUALI INTEGRATED CIRCUIT CORP
  • US12136551B2 patent drawing
  • US12136551B2 patent drawing
  • US12136551B2 patent drawing

AI summary

A method for forming a FinFET super well, forming a deep well and a well region in a silicon substrate, followed by formation the fin structure under a hard mask layer; etching a first portion of a fin, performing the first ion implantation for adjusting the threshold voltage at a first height of the fin, the hard mask layer protects the fin structures from ion implantation damages to the fin top; etching a second portion of the fin, performing the second anti-punch through ion implantation at the second height, and in annealing, the implanted ions laterally diffuse into the fin. Finally, the deep well, the well region, the first ion implantation layer for adjusting the threshold voltage, and the second ion implantation layer for anti-punch through jointly form the FinFET super well, which increases the carrier mobility, thereby improving the device performance.