FinFET Thyristor Switch Structure for Low-Capacitance Interface Protection
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Solution Overview
Problem
Electronic systems, particularly those using FinFET technologies for high-speed communication interfaces, face challenges in protecting against electrical overstress events such as EOS, EMI, and ESD, which can lead to damage from overvoltage conditions and high power dissipation.
Innovation Solution
The implementation of FinFET thyristors with high voltage tolerance and low capacitance, combined with FinFET triggering circuitry, provides effective electrical overstress protection for ICs. These thyristors include cross-coupled PNP and NPN bipolar transistors and are designed to handle high stress current and RF power while allowing wide bandwidth operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional protection structures are used, then electrical overstress protection is provided, but parasitic capacitance increases and RF performance deteriorates
Solution Approach 1:
The patent changes the physical and electrical parameters of the protection structure by using FinFET technology with specific dimensional constraints (fin height 5-20nm, channel length 10-50nm) and doping profiles to achieve low capacitance characteristics while maintaining overstress protection capability
Solution Approach 2:
The patent replaces conventional planar transistor-based protection structures with FinFET-based structures, utilizing the three-dimensional controlled depletion region to achieve superior capacitance characteristics and RF performance while maintaining protection functionality
2Reliability
If high voltage tolerance is achieved, then electrical overstress protection is improved, but device area increases
Solution Approach 1:
The patent transitions from two-dimensional planar transistor structures to three-dimensional FinFET structures, where the vertical fin geometry provides enhanced voltage tolerance through increased breakdown voltage capability without proportionally increasing the planar device footprint
Solution Approach 2:
The patent optimizes critical dimensions including fin height (5-20nm), channel length (10-50nm), and doping concentrations to achieve high voltage tolerance (withstanding up to 5-10x normal operating voltages) while minimizing the occupied device area through compact FinFET geometry
3Object-affected harmful factors
If low capacitance is achieved for wide bandwidth operation, then RF performance is improved, but protection robustness deteriorates
Solution Approach 1:
The patent carefully balances capacitance-reducing parameters (smaller fin dimensions, optimized doping) with protection-ensuring parameters (adequate breakdown voltage, sufficient current handling), achieving capacitance values low enough for wide bandwidth operation while maintaining robustness against electrical overstress events
Solution Approach 2:
The FinFET structure provides dynamic control of the depletion region that adapts to different voltage conditions, maintaining low capacitance during normal RF operation while automatically enhancing protection capability during overstress events through voltage-dependent depletion region expansion
Data Source
AI summary
FinFET multi-diode thyristor switches for protecting high data rate communication system interfaces are provided. In certain embodiments herein, high voltage tolerant FinFET thyristors are provided for handling high stress current and high RF power handling capability while providing low capacitance to allow wide bandwidth operation. Thus, the FinFET thyristors can be used to provide electrical overstress protection for ICs fabricated using FinFET technologies, while addressing tight radio frequency design window and robustness. In certain implementations, the FinFET thyristors include a first thyristor, a FinFET triggering circuitry and a second thyristor that serves to provide bidirectional blocking voltage and overstress protection. The FinFET triggering circuitry also enhances turn-on speed of the thyristor and/or reduces total on-state resistance.