FinFET Fabrication Using 8.05-Degree Substrate Tilt for Carrier Mobility
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Solution Overview
Problem
The scaling down of semiconductor devices poses challenges in achieving effective electrical control and carrier mobility in FinFETs, as existing manufacturing processes struggle to optimize the structural features of silicon-based fins and gate stacks for improved performance.
Innovation Solution
A method involving the determination of a specific tilt angle (8.05 degrees) from the normal vector of a silicon (110) lattice plane to pattern semiconductor substrates, forming trenches and fins, followed by the deposition of insulators and a gate stack, and the growth of strained material portions over the fins to enhance electrical control and carrier mobility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional manufacturing processes are used for FinFET fabrication, then existing process compatibility is maintained, but electrical control and carrier mobility are insufficient
Solution Approach 1:
The patent applies parameter changes by precisely controlling the tilt angle of the silicon substrate at 8.05 degrees from the <110> crystal orientation. This specific angular parameter enables the formation of fins with sidewalls on the <551> crystal plane, which provides superior electrical control and carrier mobility compared to conventional fin structures, while remaining compatible with existing CMOS fabrication processes
Solution Approach 2:
The patent introduces asymmetry in the crystallographic orientation of the fin sidewalls by tilting the substrate at a specific angle. The sidewalls are formed on the <551> crystal plane rather than conventional orientations, creating an asymmetric structure that optimizes carrier mobility and electrical control without requiring complete process redesign
2Productivity
If device size is scaled down, then integration density is improved, but electrical control and carrier mobility deteriorate
Solution Approach 1:
By changing the crystallographic parameter (tilt angle of 8.05 degrees), the patent enables scaled-down devices to maintain high carrier mobility. The specific angular parameter ensures that even as device dimensions decrease, the fin sidewalls maintain the optimal <551> orientation for carrier transport, allowing continued scaling without sacrificing electrical performance
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the fabrication of FinFETs with improved electrical control and carrier mobility, leading to enhanced device performance by optimizing the structural features of the silicon-based fins and gate stacks.
Implementation Method 1
strained material portions are formed to cover the semiconductor fin revealed by the gate stack
Data Source
AI summary
A method of fabricating a FinFET includes at last the following steps. A <551> direction is determined by tilting 8.05±2 degrees from a normal vector of a (110) lattice plane of a semiconductor substrate. The semiconductor substrate is patterned along a lattice plane perpendicular to the <551> direction, so as to form a plurality of trenches in the semiconductor substrate and at least one semiconductor fin having sidewalls disposed on a (551) lattice plane. Insulators are in the trenches. A gate stack is formed over portions of the semiconductor fin and over portions of the insulators. Strained material portions are formed over the semiconductor fins revealed by the gate stack.