FinFET Fin Structure with Two-Step Etching for Geometry Control

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current methods for forming Fin Field-Effect Transistors (FinFETs) face challenges in achieving precise control over the formation of semiconductor fins and isolation regions, which affects the device's performance and manufacturing efficiency.

Innovation Solution

A two-step etching process is employed to form semiconductor fins, involving the creation of initial trenches and subsequent extension of these trenches, followed by the formation of isolation regions and recessing to create distinct fin structures, allowing for precise control over fin geometry and stress distribution.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If a conventional single-step etching process is used to form FinFETs, then the manufacturing process is simpler and faster, but the control over fin geometry and stress distribution is insufficient

Engineering Contradiction:
Improvefin geometry controlVSAvoidetching process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The etching process is divided into two distinct steps: a first etching step that forms initial trenches and isolation regions, and a second etching step that extends the trenches to form the final fin structures. This segmentation allows independent optimization of each step's parameters to achieve precise fin geometry control while managing process complexity

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The first etching step performs preliminary actions by forming trenches and isolation regions before the final fin formation. This preliminary structuring enables better control over the subsequent second etching step, allowing precise adjustment of fin geometry and stress distribution without requiring complete re-etching

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If a two-step etching process is used to form FinFETs, then the control over fin geometry and stress distribution is improved, but the manufacturing process becomes more complex and time-consuming

Engineering Contradiction:
Improvefin geometry controlVSAvoidmanufacturing efficiency
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

By segmenting the etching into two steps with distinct purposes (isolation region formation in step one, fin extension in step two), each step can be optimized for its specific function, reducing the need for iterative adjustments and rework that would otherwise reduce productivity

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The preliminary formation of isolation regions and initial trenches in the first etching step establishes a structured foundation that guides the second etching step, enabling more efficient and precise fin formation without requiring multiple correction cycles

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11935889B2Fin structure and method of forming same through two-step etching processes
Publication Date: 2024.03.19 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11935889B2 patent drawing
  • US11935889B2 patent drawing
  • US11935889B2 patent drawing

AI summary

A method includes, in a first etching step, etching a semiconductor substrate to form first recesses in a first device region and second recesses in a second device regions simultaneously. A first semiconductor strip is formed between the first recesses. A second semiconductor strip is formed between the second recesses. In a second etching step, the semiconductor substrate in the second device region is etched to extend the second recesses. The first recesses and the second recesses are filled with a dielectric material to form first and second isolation regions in the first and second recesses, respectively. The first isolation regions and the second isolation regions are recessed. Portions of the semiconductor substrate in the first and the second device regions protrude higher than top surfaces of the respective first and second isolation regions to form a first and a second semiconductor fin, respectively.