FinFET Heat Dissipation via Vertical Isolation Openings

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Solution Overview

Problem

Fin field effect transistors (FinFETs) experience a significant self-heating effect due to their design, which limits their ability to transfer heat, leading to reduced driving current and increased leakage current, affecting the lifetime of semiconductor devices as device dimensions continue to shrink.

Innovation Solution

A method is developed to fabricate semiconductor devices with fins that have a larger bottom size than top size, and an isolation structure with a top surface lower than the fins, covering their sidewalls, to enhance heat transfer by forming second openings at the bottom of first openings, allowing heat to be transferred from fins to the base substrate and released externally.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If fin field effect transistors are designed with gate structures surrounding the fins to improve electrostatic control, then electrostatic control performance is improved, but self-heating effect increases

Engineering Contradiction:
Improveelectrostatic control performanceVSAvoidself-heating effect
Core Design Contradiction:
ReliabilityVSTemperature

Solution Approach 1:

The patent introduces a new spatial dimension by creating second openings at the bottom of first openings, forming a three-dimensional heat dissipation architecture. This allows heat to be conducted from the fin bottom to the base substrate through vertical heat transfer pathways, complementing the lateral electrostatic control already provided by the surrounding gate structures.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The isolation structure serves as a thermal intermediary by conducting heat from the fin bottom to the base substrate. The isolation structure film and形成的isolation structure act as thermal pathways that mediate heat transfer, allowing heat to be efficiently conducted away from the fin region through the isolation structure to the base substrate for external dissipation.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If device dimensions are continuously reduced to increase integration density, then device density and speed are improved, but heat transfer capability deteriorates

Engineering Contradiction:
Improvedevice density and speedVSAvoidheat transfer capability
Core Design Contradiction:
ProductivityVSTemperature

Solution Approach 1:

The patent segments the heat dissipation function by creating multiple independent heat transfer pathways through first openings and second openings. Each fin structure has its own dedicated heat dissipation channels that extend from the top surface through the isolation structure film to the base substrate, allowing parallel heat transfer that scales with device density.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent adds vertical heat transfer dimension by forming second openings at the bottom of first openings, creating heat dissipation pathways that extend in the vertical direction from fin bottom to base substrate. This three-dimensional heat transfer architecture compensates for the reduced lateral heat transfer capability caused by miniaturization.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces the self-heating effect, improves the performance of semiconductor devices by enhancing heat transfer and reducing heat accumulation, thereby extending the lifetime of FinFETs.

Implementation Method 1

allowing heat to be transferred from fins to the base substrate and released externally

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS10651092B2Semiconductor device and fabrication method thereof
Publication Date: 2020.05.12 SEMICON MFG INT (SHANGHAI) CORP
  • US10651092B2 patent drawing
  • US10651092B2 patent drawing
  • US10651092B2 patent drawing

AI summary

Semiconductor device and fabrication method are provided. The method includes: providing a base substrate; forming an isolation structure film on the base substrate, a top portion of the isolation structure film containing a plurality of first openings; forming a second opening at a bottom of each first opening by removing a portion of the isolation structure film to expose a surface of the base substrate, where the second opening has a size larger than a corresponding first opening along a direction in parallel with the surface of the base substrate; forming fins in the first and second openings; and forming an isolation structure by removing a portion of an isolation material film, where a top surface of the isolation structure is lower than a top surface of the fins and the isolation structure covers a portion of the sidewalls of the fins. The semiconductor devices formed by the method may reduce the self-heating effect and improve the performance of semiconductor devices.