FinFET Well Co-Implantation for Dopant Diffusion Control

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Solution Overview

Problem

The challenge in FinFET manufacturing is the diffusion of dopants during thermal processes, leading to dopant loss and increased resistivity, which can cause latch-up in CMOS devices and reduce the effectiveness of transistors.

Innovation Solution

Co-implantation of a diffusion-retarding element, such as carbon, into well regions to reduce dopant diffusion and maintain dopant concentration, specifically using tilt implantation and adjusting the position of the co-implantation region to control dopant profiles effectively.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If standard dopant implantation is used in FinFET manufacturing, then transistor formation is achieved, but dopant diffusion occurs during thermal processes leading to dopant loss and increased resistivity

Engineering Contradiction:
Improvetransistor performanceVSAvoiddopant concentration
Core Design Contradiction:
ReliabilityVSLoss of substance

Solution Approach 1:

Carbon is introduced as an intermediary substance during dopant implantation. The carbon atoms form a barrier that mediates the interaction between dopant atoms and the silicon lattice, reducing dopant diffusion into isolation regions while maintaining the necessary dopant concentration in the well regions for proper transistor operation.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent creates a composite doped region by co-implanting carbon with the dopant (boron or phosphorous). This composite material structure, where carbon and dopant atoms are simultaneously introduced, provides both the electrical properties needed for transistor operation and the diffusion barrier properties to prevent dopant loss during subsequent thermal processing.

Inventive Principle:
Principle #40Composite materials

2Reliability

If dopant concentration is increased to maintain transistor effectiveness, then transistor performance improves, but dopant diffusion into isolation regions increases causing latch-up

Engineering Contradiction:
Improvetransistor effectivenessVSAvoidlatch-up risk
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

Carbon serves as an intermediary barrier that allows high dopant concentrations to be maintained in the well regions for transistor effectiveness while preventing the harmful diffusion of dopants into isolation regions that would cause latch-up. The carbon layer acts as a selective barrier.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The carbon co-implantation creates local quality differences in the dopant distribution. The carbon concentrates at specific depths to form a barrier layer, while the dopant is distributed to provide the necessary concentration in the well regions. This local differentiation allows high dopant concentration where needed without the harmful effects where not needed.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The co-implantation method significantly reduces dopant diffusion into isolation regions, minimizes inter-diffusion between p-well and n-well dopants, and maintains consistent dopant concentrations, thereby enhancing the performance and reliability of FinFETs by preventing latch-up and maintaining transistor efficiency.

Implementation Method 1

performing a second implantation process on the semiconductor substrate with a diffusion-retarding element to form a co-implantation region

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Implementation Method 2

performing a second implantation process on the semiconductor substrate with a diffusion-retarding element to form a co-implantation region

Methodology Applied
Scientific EffectDiffusion barrier: Diffusion Barrier

Data Source

PatentUS11978634B2Reduce well dopant loss in FinFETs through co-implantation
Publication Date: 2024.05.07 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11978634B2 patent drawing
  • US11978634B2 patent drawing
  • US11978634B2 patent drawing

AI summary

A method of forming a semiconductor device includes performing a first implantation process on a semiconductor substrate to form a deep p-well region, performing a second implantation process on the semiconductor substrate with a diffusion-retarding element to form a co-implantation region, and performing a third implantation process on the semiconductor substrate to form a shallow p-well region over the deep p-well region. The co-implantation region is spaced apart from a top surface of the semiconductor substrate by a portion of the shallow p-well region, and the dee p-well region and the shallow p-well region are joined with each other. An n-type Fin Field-Effect Transistor (FinFET) is formed, with the deep p-well region and the shallow p-well region acting as a well region of the n-type FinFET.