FinFET Wet Etching for Variable-Gap Fin Height Control
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Solution Overview
Problem
Conventional FinFET fabrication processes struggle to control fin height and channel area, particularly when dealing with gaps of variable critical dimension (CD), limiting the ability to adjust fin width and height independently, which is essential for achieving desired performance in integrated circuit devices.
Innovation Solution
The implementation of a wet etch process instead of a dry etch process to control fin height in FinFETs, utilizing etch solutions with varying etch rates based on gap CD, allowing for precise adjustment of fin height and channel area by using non-aqueous organic-based or aqueous-based etch solutions that differentially etch oxide material in gaps of different sizes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a dry etch process is used to remove oxide material, then the etching process is uniform across all gaps, but the fin height cannot be independently controlled for different gap sizes
Solution Approach 1:
The patent applies local quality by using wet etch solutions with different etch rates that selectively remove oxide material at different rates depending on the local gap critical dimension. Smaller gaps experience different etch rates compared to larger gaps, enabling localized control of fin height based on gap size without requiring uniform treatment across all regions.
Solution Approach 2:
The patent changes the etch rate parameter by selecting wet etch solutions with varying etch rates. This parameter change allows the etching process to be sensitive to gap critical dimension, thereby enabling independent control of fin height and fin width through the relationship between etch rate and gap size.
2Manufacturing precision
If conventional processes are used, then channel area can only be adjusted in whole number increments, but fine-tuning of channel area is needed for optimized device performance
Solution Approach 1:
The patent uses parameter changes in the wet etch process, where the etch rate varies with gap critical dimension. This continuous parameter variation enables fine-tuning of fin height and channel area beyond discrete whole number increments, allowing optimized device performance through precise channel area control.
3Manufacturing precision
If wet etch solutions with varying etch rates are used, then fin height and channel area can be precisely controlled, but the process complexity increases
Solution Approach 1:
The patent applies self-service by utilizing the natural relationship between gap critical dimension and wet etch rate. The process automatically achieves differential etching based on gap size without requiring complex external control mechanisms, allowing the system to self-regulate the etching process according to the geometric parameters of the structures being etched.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables greater control over fin height and channel area, allowing for the formation of FinFETs with tailored performance characteristics in different function areas of integrated circuits, overcoming the limitations of conventional processes that only allow whole number increments in channel area adjustments.
Implementation Method 1
etching the oxide material by exposing the patterned substrate to an etch solution, wherein the etching controls the fin height in the FinFET fabrication process by removing the oxide material deposited within the gaps at different etch rates
Data Source
AI summary
Embodiments of improved process flows and methods are provided in the present disclosure to control fin height and channel area in a fin field effect transistor (FinFET) having gaps of variable CD. More specifically, the present disclosure provides improved transistor fabrication processes and methods that utilize a wet etch process, instead of a dry etch process, to remove the oxide material deposited within the gaps formed between the fins of a FinFET. By utilizing a wet etch process, the improved transistor fabrication processes and methods described herein provide a means to adjust or individually control the fin height of one or more the fins, thereby providing greater control over the channel area of the FinFET.