Wafer-Level Fingerprint Chip Packaging with High-Dielectric Cover
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Solution Overview
Problem
Conventional fingerprint recognition devices require high sensitivity for the fingerprint recognition chip, which is difficult to fabricate and expensive, limiting their application due to the need for a thick glass base plate to protect the chip and accurately detect capacitance differences between finger ridges and valleys.
Innovation Solution
A wafer-level chip packaging method is introduced, where a thinner cover layer with a Mohs hardness greater than or equal to 8 H and a dielectric constant greater than or equal to 7 is used on the fingerprint recognition chip, reducing the thickness and sensitivity requirements, and a plug structure is formed in the substrate to connect the chip to an external circuit, simplifying the packaging process and reducing damage to the sensing area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a thick glass base plate is used to protect the fingerprint recognition chip, then the chip is protected and can accurately detect capacitance differences, but the sensitivity requirements for the chip increase and fabrication becomes difficult
Solution Approach 1:
The patent changes the key parameters of the cover layer: using materials with Mohs hardness ≥8 H and dielectric constant ≥7. This allows the cover layer to be made thinner while maintaining both protective function and electrical isolation performance, thereby reducing the sensitivity requirements for the fingerprint recognition chip.
Solution Approach 2:
The patent specifies using composite or specific material compositions for the cover layer, such as inorganic nanomaterials, polymeric materials, glass materials, or ceramic materials with specific properties. These composite materials provide both mechanical protection and appropriate dielectric characteristics, enabling thinner design while maintaining chip protection and detection accuracy.
2Reliability
If a thick glass base plate is used to protect the chip, then protection is ensured, but the packaging process becomes complex requiring additional conductive structures
Solution Approach 1:
By changing the dielectric constant parameter of the cover layer material to ≥7, the electrical isolation performance is enhanced. This allows the packaging structure to be simplified by eliminating additional conductive structures, as the high-dielectric cover layer itself provides sufficient electrical isolation between the finger and the chip.
Solution Approach 2:
The patent extracts and removes the additional conductive structures from the packaging process. By using a cover layer with sufficiently high dielectric constant, the function of electrical isolation is integrated into the protective cover layer itself, eliminating the need for separate conductive isolation structures and simplifying the overall packaging process.
3Reliability
If conventional packaging methods are used with thick glass base plate, then chip protection is achieved, but manufacturing costs increase
Solution Approach 1:
The patent changes the material parameters to enable a thinner cover layer design. By specifying Mohs hardness ≥8 H and dielectric constant ≥7, the cover layer can be made thinner while maintaining protection and electrical isolation functions, reducing material costs and simplifying manufacturing processes.
Solution Approach 2:
The patent employs material specifications that enable cost-effective manufacturing. By defining specific material properties (hardness and dielectric constant) rather than requiring expensive proprietary materials, the solution allows for the use of cost-effective materials that meet the performance requirements, thereby reducing overall manufacturing costs.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method reduces the sensitivity requirements of the fingerprint recognition chip, enabling wider use and simplifying the packaging process while ensuring accurate fingerprint detection and reducing manufacturing costs.
Implementation Method 1
the cover layer has a Mohs hardness greater than or equal to 8 H and a dielectric constant greater than or equal to 7
Data Source
AI summary
A chip package structure and packaging method are provided. The chip package structure includes a sensing chip, a covering layer located on the first surface of the sensing chip, and a plug structure located in the sensing chip. The sensing chip includes a first surface, a second surface opposite to the first surface, and a sensing area located on the first surface. The second surface of the sensing chip faces to a base plate. One end of the plug structure is electrically connected to the sensing area, and the other end of the plug structure is exposed by the second surface of the sensing chip.


